研究目的
Investigating the electrothermal responses of large-scale PCM arrays, including thermal crosstalk suppression and scaling effects, and proposing a multibit PCM design.
研究成果
The in-house parallel simulator effectively models electrothermal processes in large-scale PCM arrays, demonstrating the potential of diamond layers in suppressing thermal crosstalk and the feasibility of multibit PCM designs for enhanced storage density.
研究不足
The study focuses on numerical simulations, and practical implementation challenges such as manufacturing the proposed diamond layer and integrating the multibit PCM cells into existing systems are not addressed.
1：Experimental Design and Method Selection:
The study employs an in-house parallel simulator based on DDM and FETD for simulating large-scale PCM arrays.
2：Sample Selection and Data Sources:
The simulation involves PCM arrays with different architectures and materials, including a diamond layer for thermal crosstalk suppression.
3：List of Experimental Equipment and Materials:
The simulator runs on the TianHe-II supercomputer, utilizing MPI for parallel processing.
4：Experimental Procedures and Operational Workflow:
The simulation process includes solving electrical and thermal governing equations in parallel, with dynamic workload distribution.
5：Data Analysis Methods:
The performance of the simulator is evaluated in terms of accuracy and scalability, and the electrothermal characteristics of PCM arrays are analyzed.
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