研究目的
To review various device structures of Tunnel FET (TFET) and compare their performances for attaining the desired ION / IOFF, addressing the challenges of power utilization and the limitations of traditional MOSFETs at nanometer scales.
研究成果
The paper concludes that selecting appropriate device architectures for TFET can significantly improve ON current and reduce ambipolar behavior, making TFETs a promising option for ultra-low power applications. The review highlights the importance of structural innovations in achieving better sub-threshold slope (SS) and overall device performance.
研究不足
The review is based on existing literature and simulations, which may not cover all potential TFET structures or materials. The performance comparisons are limited to the parameters reported in the referenced studies.
