研究目的
To present a 50 V RF power multi-gate LMOS (MG-LMOS) structure on InGaAs with p-type InP substrate for improved RF and DC performance.
研究成果
The power MG-LMOS structure on InGaAs for RF application is designed by employing trenches in the planar technology. The three-gate electrodes create multi-channels in p-base region enhancing the ID, lowering Ron,sp and increasing peak gm which leads to provide higher fT and fmax as compared to the CP-LMOS. The proposed MG-LMOS device is suitable for RF power amplifier integrated circuit applications.
研究不足
The study is based on 2-D simulations and does not include experimental validation. The performance improvements are theoretical and may vary in practical applications.
1：Experimental Design and Method Selection:
The study involves designing a multi-channel-gate-trench RF LMOS (MG-LMOS) on InGaAs at a cell pitch of 5 μm for improved RF and DC performance. The design includes three n+-polysilicon gate electrodes placed in a trench and an n+ InGaAs layer at the bottom of the epitaxial layer acting as a drain.
2：Sample Selection and Data Sources:
The device structures of MG-LMOS and CP-LMOS were implemented in the device simulator, SILVACO ATLAS.
3：List of Experimental Equipment and Materials:
The study uses n+-polysilicon as a gate electrode with a
4：5 μm gate-length and 30 nm thick Al2O3 as gate-dielectric. Experimental Procedures and Operational Workflow:
The study involves 2-D numerical simulations using identical models for both devices, including the Shockley-Read-Hall (srh) model for carrier generation-recombination, concentration dependent mobility model (conmob), field dependent mobility model (fldmob), and Selberherr's Model (impact selb) for impact ionization.
5：Data Analysis Methods:
The performance parameters such as drain current (ID), breakdown voltage (Vbr), transconductance (gm), specific on-resistance (Ron,sp), cut-off frequency (fT), and maximum oscillation frequency (fmax) are compared between MG-LMOS and CP-LMOS.
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