研究目的

To accurately predict ESD robustness through circuit simulation of protection architectures in integrated circuits that use diodes by proposing an enhanced model that simulates all physical device behaviors under high current transient ESD conditions.

研究成果

The proposed comprehensive diode model accurately simulates device behaviors under ESD stress conditions, including voltage overshoot, on-resistance variation, and thermal failure. The model's simulation results closely match measurements, demonstrating its effectiveness in predicting ESD robustness. The inclusion of a thermal monitor allows for accurate prediction of thermal failure under different pulse width conditions.

研究不足

The model's accuracy is dependent on the parameters extracted from measurements and the assumption of a fixed failure temperature. The complexity of the model may also pose challenges in implementation for some circuit simulation environments.