研究目的
Investigating the feasibility and efficiency of collective die direct bonding for integrating III/V devices on silicon circuits for photonic applications.
研究成果
The collective die direct bonding process developed shows promising results for integrating III/V devices on silicon circuits, with a high transfer rate and acceptable placement accuracy. Automation improvements could further enhance the process for manufacturing requirements.
研究不足
The process is sensitive to particle contamination, and the placement accuracy is currently limited to a few hundred micrometers. The bonding yield, while promising, could be affected by the quality of the InP material.
1：Experimental Design and Method Selection:
The study focuses on collective die direct bonding as a method for integrating III/V devices on silicon circuits, emphasizing throughput over placement precision.
2：Sample Selection and Data Sources:
Silicon and InP dies are used to evaluate the bonding process.
3：List of Experimental Equipment and Materials:
Includes a silicon die holder, die sorter equipment (ROYCE MP300), UV/O3 treatment, O2 plasma activation, megasonic transducer tool (MegPie?), and acoustic scan microscopy (TePla SAM450).
4：0). Experimental Procedures and Operational Workflow:
4. Experimental Procedures and Operational Workflow: The process involves die cleaning, holder filling, surface activation, die transfer via capillary forces, and bonding evaluation.
5：Data Analysis Methods:
Acoustic images are processed with ImageJ software to measure bonding yield and placement accuracy.
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