研究目的
To design a device structure as simple as possible with high device performance for planar perovskite solar cells (PSCs), being beneficial to decreasing process complexity, improving device stability and reducing fabrication cost.
研究成果
The simulation results indicate that high PCE for PSCs with simple structure may be achieved by selecting combinations of appropriate TCOs and p-type perovskites, even without traditional HTL and ETL. This study provides a guide to design and fabrication of carrier transporting layer free PSCs.
研究不足
The study is based on numerical simulation, which may not fully capture all real-world conditions and material behaviors. The performance of actual devices may vary due to fabrication imperfections and environmental factors.
1:Experimental Design and Method Selection:
The study modeled and simulated two categories of configurations, p-CH3NH3PbI3 based hole transporting layer (HTL) free planar PSCs, as well as p-CH3NH3PbI3 based HTL- free and electron transporting layer (ETL) free planar PSCs using AFORS-HET software.
2:Sample Selection and Data Sources:
The configurations included ZnO:Al/ZnO/CH3NH3PbI3, ZnO:Al/TiO2/CH3NH3PbI3, ZnO:Al/CH3NH3PbI3, FTO/CH3NH3PbI3, and ITO/CH3NH3PbI
3:List of Experimental Equipment and Materials:
AFORS-HET software was used for simulation.
4:Experimental Procedures and Operational Workflow:
The performance of these PSCs was analyzed in detail, considering factors such as interface defect layer, trap density of the perovskite layer, series resistance, and shunt resistance.
5:Data Analysis Methods:
The power conversion efficiency (PCE) was calculated and compared among different configurations.
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