研究目的
To investigate the fabrication and performance of MoS2-graphene lateral heterostructures for next-generation semiconductor devices, focusing on overcoming the challenges of spatial control and large area integration.
研究成果
The MoS2-graphene lateral heterostructure exhibits superior performance in FETs compared to MoS2-only counterparts, attributed to decreased contact resistance. The study highlights the potential of TMD-based lateral heterostructures for next-generation device fabrication.
研究不足
The study is limited by the challenges of suppressing vertical heterogrowth of MoS2 on graphene and the inevitable formation of overlapped junctions due to large lattice mismatch between MoS2 and graphene.
1：Experimental Design and Method Selection:
The study combines the concept of lateral heterostructure with chemical vapor deposition (CVD) to achieve large area growth with precise spatial control. MoS2 is grown on patterned graphene at variable temperatures to favor lateral heterogrowth over vertical heterogrowth.
2：Sample Selection and Data Sources:
Monolayer graphene synthesized by inductively coupled plasma-chemical vapor deposition (ICP-CVD) was transferred onto a SiO2 (90 nm)/Si substrate. MoS2 was synthesized by powder vaporization in an Ar flow using MoO3 and S powders as precursors.
3：List of Experimental Equipment and Materials:
ICP-CVD for graphene growth, tube furnace for MoS2 growth, photolithography and oxygen plasma etching for patterning, atomic force microscopy (AFM), scanning electron microscopy (SEM), Raman and photoluminescence (PL) spectroscopy for characterization.
4：Experimental Procedures and Operational Workflow:
Graphene was transferred onto SiO2/Si, patterned, and then MoS2 was grown at controlled temperatures. The heterostructure was characterized and used to fabricate field effect transistors (FETs).
5：Data Analysis Methods:
Performance of FETs was evaluated based on on/off ratio and field effect mobility. Contact resistance was extracted using the Y-function method.
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MoO3
≥99.5%
Sigma Aldrich
Used as a precursor for MoS2 growth.
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S
99.98%
Sigma Aldrich
Used as a precursor for MoS2 growth.
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PTAS
Used as a seed promoter for MoS2 growth.
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Al2O3
20 nm
Used as a gate dielectric in FET fabrication.
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Pd
15 nm
Used as a source/drain metal in FET fabrication.
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Au
35 nm
Used as a source/drain metal in FET fabrication.
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Cr
15 nm
Used as a gate metal in FET fabrication.
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Ti
15 nm
Used as a source/drain metal in MoS2-only FETs.
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