研究目的
Investigating the design and performance of a 34-GBd linear transimpedance amplifier for 200-Gb/s DP-16-QAM optical coherent receivers.
研究成果
The demonstrated TIA achieves high performance with low noise, wide bandwidth, and high linearity, enabling 100- and 200-Gb/s single wavelength optical coherent receiver operation. The dual-TIA chip shows promising results for next-generation optical communication links.
研究不足
The study focuses on the design and performance of a specific TIA architecture for coherent optical receivers. Limitations may include the specific process technology (0.13-μm SiGe BiCMOS) and the operational conditions (34 GBd, specific modulation formats).
1:Experimental Design and Method Selection:
The study presents a fully differential optical receiver architecture with a variable-gain transimpedance amplifier (VG-TIA) and a VG amplifier (VGA), employing a dual-feedback AGC loop for low-noise and high-linearity operation. A new PD dc current cancellation scheme is developed for the differential front-end TIA.
2:Sample Selection and Data Sources:
A prototype dual-TIA chip is fabricated in a 0.13-μm SiGe BiCMOS process.
3:13-μm SiGe BiCMOS process.
List of Experimental Equipment and Materials:
3. List of Experimental Equipment and Materials: The TIA chip is tested electrically by wafer probing and optically using a complete coherent optical communication link setup.
4:Experimental Procedures and Operational Workflow:
The TIA's performance is evaluated in terms of input-referred noise density, bandwidth, and total harmonic distortion. Optical measurements are performed at 34 GBd using DP-QPSK and DP-16-QAM formats.
5:Data Analysis Methods:
The TIA's transimpedance gain is calculated from S-parameters. BER versus OSNR is measured for performance evaluation.
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