研究目的
Investigating the thermal stability and performance of asymmetrical double metal double gate (ADMDG) and symmetrical double metal double gate (SDMDG) SOI MOSFETs at the zero-temperature-coef?cient (ZTC) bias point.
研究成果
The SDMDG structure exhibits better performance compared to ADMDG at room temperature, with a 10 times higher Ion/Ioff ratio, an 11.07% increase in intrinsic gain Av, and a 37% increase in fT. SDMDG MOSFET leads to a major enhancement in DC, analog and RF performances and can be used for various choice of temperature applications.
研究不足
The study is limited to simulation results and does not include experimental validation. The focus is on specific device structures (ADMDG and SDMDG) and may not be generalizable to other MOSFET designs.
1:Experimental Design and Method Selection:
The study uses 2-D Atlas simulator for simulating ADMDG and SDMDG devices to analyze their performance at the ZTC bias point.
2:Sample Selection and Data Sources:
The devices are simulated with specific physical dimensions and doping concentrations.
3:List of Experimental Equipment and Materials:
2-D Atlas simulator, molybdenum for metal gate technology.
4:Experimental Procedures and Operational Workflow:
Simulation is performed with FLDMOB, CONMOB and Lombardi models (CVT), Shockley–Read–Hall (SRH) model along with Auger recombination model for varying operating temperature (100–400 K).
5:Data Analysis Methods:
Analysis of electrostatic performance parameters such as Ion, Ioff, Ion/Ioff ratio, and analog/RF performance parameters like gm, gd, Av, and fT.
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