研究目的
Investigating the development and reliability of 1200 V 80 m? SiC MOSFETs for mass production, focusing on avalanche ruggedness, gate oxide integrity, and threshold voltage stability.
研究成果
The developed 1200 V 80 m? SiC MOSFETs demonstrate excellent avalanche ruggedness, high voltage blocking reliability, and state-of-the-art threshold voltage stability. Optimized process conditions significantly reduce extrinsic defects in gate oxide breakdown distributions, ensuring reliable performance in demanding applications.
研究不足
The study focuses on specific conditions and may not cover all potential failure modes or operational environments. The gate oxide integrity testing is destructive, limiting the ability to test all devices.
1：Experimental Design and Method Selection:
The study involved the development of SiC MOSFETs using ON Semiconductor’s internally developed SiC MOSFET process for 150 mm wafers. Avalanche ruggedness was tested using unclamped inductive switching (UIS), and gate oxide integrity was assessed through gate-source breakdown voltage measurements.
2：Sample Selection and Data Sources:
Samples included five wafers for avalanche ruggedness testing and 770 devices for high temperature reverse bias (HTRB) tests.
3：List of Experimental Equipment and Materials:
SiC MOSFETs, NMOS capacitors, and TO-247 packages were used.
4：Experimental Procedures and Operational Workflow:
UIS measurements were performed on-wafer, and HTRB tests were conducted at 175 °C with VDS=1200 V and VGS=0 V. Gate oxide integrity was tested using the GOI/Vramp technique.
5：Data Analysis Methods:
Statistical analysis of failure distributions and time-resolved measurements of threshold voltage drift were performed.
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