研究目的
To construct a Gaussian random number generator using FPGA for quantum key distribution, comparing three algorithms (Box-Muller, polarization decision, and central limit) to identify the most efficient and high-quality method.
研究成果
The polarization decision algorithm implemented in FPGA is superior, requiring fewer resources and producing high-quality GRNs that pass null hypothesis tests, making it suitable for QKD systems. FPGA's parallel processing enables high-speed data handling, and IP cores facilitate complex mathematical operations. Future work could optimize FPGA designs for longer periods and higher accuracy.
研究不足
The central limit algorithm shows poor accuracy in tail regions and is rejected by null hypothesis tests; it requires more URNs for better approximation, increasing computational load. FPGA resource constraints (e.g., LUT usage) may limit scalability, and the period of GRNs depends on FPGA capabilities, potentially affecting security in long-term applications.
1:Experimental Design and Method Selection:
The study involves designing and implementing three GRN generation algorithms (Box-Muller, polarization decision, central limit) on an FPGA to compare their performance and resource usage in the context of QKD systems. Theoretical models include statistical distributions and FPGA-based hardware design.
2:Sample Selection and Data Sources:
Uniform random numbers (URNs) are generated using a Multi-return Shift Register Generator (MSRG) with a primitive polynomial f(x) = x^32 + x^8 + x^5 + x^2 + 1, producing sequences with a period of 2^32 - 1. GRN samples (1,000,000 numbers per algorithm) are analyzed.
3:GRN samples (1,000,000 numbers per algorithm) are analyzed.
List of Experimental Equipment and Materials:
3. List of Experimental Equipment and Materials: FPGA chip Altera Cyclone IV E EP4CE115F29I8L, IP cores (ALTFP_LOG, ALTFP_SINCOS, ALTFP_DIV, ALTFP_SQRT), and MATLAB software for statistical analysis.
4:Experimental Procedures and Operational Workflow:
URNs are generated via MSRG; GRNs are computed using the three algorithms implemented in Verilog HDL on the FPGA; outputs are exported to MATLAB for histogram analysis and null hypothesis tests (chi-square, Anderson-Darling, Kolmogorov-Smirnov).
5:Data Analysis Methods:
Statistical tests are performed in MATLAB to assess the quality and accuracy of GRNs, comparing against MATLAB's randn function.
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