研究目的
To evaluate the total-ionizing-dose (TID) responses of InGaAs nMOS FinFETs with different gate lengths irradiated under different gate biases, focusing on radiation-induced charge trapping and its dependence on gate bias and length.
研究成果
The TID response of InGaAs FinFETs is dominated by radiation-induced positive charge trapping, with worst-case degradation at VG = -1 V and for shorter gate lengths due to electrostatic effects from isolation and spacer oxides. 1/f noise measurements reveal a non-uniform defect-energy distribution, indicating high border-trap densities that change with irradiation. Future work is needed to optimize interfaces for improved radiation hardness.
研究不足
The study is limited to InGaAs nMOS FinFETs in an early development stage technology, with specific gate lengths and biases. The results may not generalize to other materials or device structures. The noise measurements are confined to a limited frequency range, and the electrostatic effects from surrounding oxides might not be fully quantified.
1：Experimental Design and Method Selection:
The study involves irradiating InGaAs nMOS FinFETs with 10-keV X-rays at a dose rate of 30.3 krad(SiO2)/min under various gate biases (±1 V or 0 V) to assess TID effects. Current-voltage (I-V) characterization and low-frequency 1/f noise measurements are used to analyze degradation and trap densities.
2：3 krad(SiO2)/min under various gate biases (±1 V or 0 V) to assess TID effects. Current-voltage (I-V) characterization and low-frequency 1/f noise measurements are used to analyze degradation and trap densities.
Sample Selection and Data Sources:
2. Sample Selection and Data Sources: InGaAs nMOS FinFETs fabricated by imec on 300 mm bulk Si wafers with gate lengths ranging from 0.23 μm to 1.03 μm, fin length of 5 μm, and fin width of 16 nm. Over 40 devices were characterized, with at least two per condition.
3：23 μm to 03 μm, fin length of 5 μm, and fin width of 16 nm. Over 40 devices were characterized, with at least two per condition.
List of Experimental Equipment and Materials:
3. List of Experimental Equipment and Materials: HP 4156A semiconductor parameter analyzer for I-V measurements, a custom low-frequency noise measurement system (as shown in Fig. 2), X-ray source for irradiation, and devices with specific gate stacks (2 nm Al2O3, 2 nm HfO2, TiN gate).
4：Experimental Procedures and Operational Workflow:
Devices were irradiated at room temperature with specified gate biases. I-V curves were measured before and after irradiation using Vd = 0.5 V. Noise measurements were performed at Vd = 0.05 V over 1 Hz to 390 Hz. Bias-stress and annealing steps were included to separate TID effects from bias-induced charging.
5：5 V. Noise measurements were performed at Vd = 05 V over 1 Hz to 390 Hz. Bias-stress and annealing steps were included to separate TID effects from bias-induced charging.
Data Analysis Methods:
5. Data Analysis Methods: Threshold voltage shifts, transconductance changes, and ON/OFF ratios were analyzed. Noise data were parameterized using frequency and voltage dependences to derive border-trap densities and energy distributions.
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