1：Experimental Design and Method Selection:

The study involved fabricating IGZO TFTs using inkjet printing for the channel layer and solution processing for the SAO gate dielectric. A linear-type printing pattern was adopted to form a thin and uniform IGZO channel, compared to dot array patterns (4×4 and 5×5). The SAO dielectric was used to improve subthreshold characteristics and enable low-voltage operation.

2：5). The SAO dielectric was used to improve subthreshold characteristics and enable low-voltage operation. Sample Selection and Data Sources:

2. Sample Selection and Data Sources: Heavily doped p-type Si wafers with 200 nm-thick SiO2 were used as substrates. IGZO precursor solutions were prepared with specific molar ratios (In:Ga:Zn =

3：

4：

5：2, total 25 M) and SAO precursor solutions with Al:

Sr =

6：

0.5 (total 0.15 M).

7：5 (total 15 M). List of Experimental Equipment and Materials:

3. List of Experimental Equipment and Materials: Equipment included an inkjet printing system (DMP-2850, Fujifilm), semiconductor parameter analyzer (4155C, Agilent), confocal microscope (VK-9710, Keyence), stylus profiler (DektakXT, Bruker), and thermal evaporation for Al electrodes. Materials included metallic precursors (Sigma-Aldrich), solvents, and substrates.

8：Experimental Procedures and Operational Workflow:

Substrates were cleaned, IGZO was inkjet-printed with various patterns (linear-type and dot arrays), annealed at 350°C, Al S/D electrodes were deposited via thermal evaporation using a shadow mask, and SAO dielectric was spin-coated and annealed. Electrical characteristics were measured.

9：Data Analysis Methods:

Field-effect mobility, subthreshold slope (SS), and total trap density of states (Nt) were extracted from transfer characteristics using standard equations for TFTs.