- 标题
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- 实验方案
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Contactless parametric characterization of bandgap engineering in p-type FinFETs using spectral photon emission
摘要： In the last decade it has become increasingly popular to use germanium enriched silicon in modern field effect transistors (FET) due to the higher intrinsic mobility of both holes and electrons in SiGe as compared to Si. Whether used in the source/drain region (S/D) as compressive stressor, which is an efficient mobility booster on Si channel devices, or as channel material, the SiGe increases channel carrier mobility and thus enhancing device performance. Because the germanium content modifies the effective bandgap energy EG, this material characteristic is an important technology performance parameter. The bandgap energy can be determined in an LED-like operation of electronic devices, requiring forward biased p-n junctions. P-n junctions in FETs are source or drain to body diodes, usually grounded or reversely biased. This investigation applies a bias to the body that can trigger parasitic forward operation of the source/drain to body p-n junction in any FET. Spectral photon emission (SPE) is used here as a non-destructive method to characterize engineered bandgaps in operative transistor devices, while the device remains fully functional. Before applying the presented technique to a p-type FinFET device, it is put to the proof by verifying the nominal silicon bandgap on an (unstrained) 120 nm technology FET. Subsequently the characterization capability for bandgap engineering is then successfully demonstrated on a SiGe:C heterojunction bipolar transistor (HBT). In a final step, the bandgap energy EG of a 14/16 nm p-type FinFET was determined to be 0.84 eV, which corresponds to a Si0.7Ge0.3 mixture. The presented characterization technique is a contactless fault isolation method that allows for quantitative local investigation of engineered bandgaps in p-type FinFETs.
关键词： p-n junction,Heterojunction bipolar transistor,Bandgap characterization,p-channel FinFET,SiGe, strained Si,Body diode, parasitic operation,Bandgap engineering,Body bias voltage,HBT,Contactless fault isolation,Spectral photon emission,MOSFET
更新于2025-09-23 15:23:52
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Electrical characterization of single nanometer-wide Si fins in dense arrays
摘要： This paper demonstrates the development of a methodology using the micro four-point probe (μ4PP) technique to electrically characterize single nanometer-wide fins arranged in dense arrays. We show that through the concept of carefully controlling the electrical contact formation process, the electrical measurement can be confined to one individual fin although the used measurement electrodes physically contact more than one fin. We demonstrate that we can precisely measure the resistance of individual ca. 20 nm wide fins and that we can correlate the measured variations in fin resistance with variations in their nanometric width. Due to the demonstrated high precision of the technique, this opens the prospect for the use of μ4PP in electrical critical dimension metrology.
关键词： micro four-point probe,electrical characterization,finFET,sheet resistance,critical dimension metrology
更新于2025-09-23 15:22:29
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[IEEE 2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) - Austin, TX, USA (2018.9.24-2018.9.26)] 2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) - Dynamical space partitioning for acceleration of parallelized lattice kinetic Monte Carlo simulations
摘要： A new dynamical space partitioning method is presented in a parallelized lattice kinetic Monte Carlo (kMC) simulator to overcome the loss of parallel efficiency found in other parallelized kMC simulators. The dynamical partitioning of the simulation cell allows better load balancing through all threads hence reducing time consuming events during the simulation. The new method is evaluated against both hypothetical and real cases. In both cases, minimal differences between serial and parallelized simulations are found. In real cases, other code optimizations may be needed to further improve the parallel efficiency.
关键词： shared memory,stochastic,nano-scale,FinFET,kMC,parallelization efficiency,OpenMP
更新于2025-09-23 15:22:29
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[IEEE 2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) - Singapore (2018.7.16-2018.7.19)] 2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) - Electrical Characterization of FEOL Bridge Defects in Advanced Nanoscale Devices Using TCAD Simulations
摘要： In this work, we present the electrical characterization of various Front-End-Of-Line (FEOL) bridge defects location using Technology Computer Aided Design (TCAD) based simulation. The electrical characteristics obtained from simulation is useful in identifying the possible locations of the bridge defects. The simulation result correlates well with nano-probing result collected on actual failing devices. Furthermore, simulation of potential defects provides a quick way of understanding how the defect may influence the electrical behavior of transistors.
关键词： Defect Simulation,TCAD,FinFET
更新于2025-09-23 15:21:01
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SET Sensitivity of Tri-Gate Silicon Nanowire Field-Effect Transistors
摘要： The SET response of SOI tri-gate silicon nanowires is investigated using direct measurements of current transients. Resulting collected charge distributions are compared to simulations in two steps: Monte-Carlo simulations of deposited energy and TCAD simulation of collected charge, using detailed description of charge generation. Good agreement with experimental data is obtained. Current simulation tools can thus be used, with minor optimization, to simulate such integrated devices. The analysis of SETs show collected charge values lower than both the charge estimated from the LET and the charge actually generated in the nanowire, revealing a limited sensitivity of nanowire devices to high LET ions.
关键词： Nanowire,SEE,Single-Event Transient,Ultra-Thin SOI,Particle-matter interaction,Single-Event Effect,Geant4,FinFET,TCAD,Multiple-gate,Simulation,SET,Experiments
更新于2025-09-23 15:21:01
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[IEEE 2018 IEEE Symposium on VLSI Technology - Honolulu, HI, USA (2018.6.18-2018.6.22)] 2018 IEEE Symposium on VLSI Technology - Hybrid 14nm FinFET - Silicon Photonics Technology for Low-Power Tb/s/mm <sup>2</sup> Optical I/O
摘要： We demonstrate a microbump flip-chip integrated 14nm-FinFET CMOS-Silicon Photonics (SiPh) technology platform enabling ultra-low power Optical I/O transceivers with 1.6Tb/s/mm2 bandwidth density. The transmitter combines a differential FinFET driver with a Si ring modulator, enabling 40Gb/s NRZ optical modulation at 154fJ/bit dynamic power consumption in a 0.015mm2 footprint. The receiver combines a FinFET trans-impedance amplifier (TIA) with a Ge photodiode, enabling 40Gb/s NRZ photodetection with -10.3dBm sensitivity at 75fJ/bit power consumption, in a 0.01mm2 footprint. High-quality data transmission and reception is demonstrated in a loop-back experiment at 1330nm wavelength over standard single mode fiber (SMF) link margin. Finally, a 4x40Gb/s, 0.1mm2 with 2dB wavelength-division multiplexing (WDM) transmitter with integrated thermal control is demonstrated, enabling Optical I/O scaling substantially beyond 100Gb/s per fiber.
关键词： optical interconnect,FinFET,silicon photonics
更新于2025-09-23 15:21:01
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[IEEE 2018 XIV International Scientific-Technical Conference on Actual Problems of Electronics Instrument Engineering (APEIE) - Novosibirsk (2018.10.2-2018.10.6)] 2018 XIV International Scientific-Technical Conference on Actual Problems of Electronics Instrument Engineering (APEIE) - The Role of Chlorine Atoms in Etching Silicon in the Plasma of CF<inf>2</inf>Cl<inf>2</inf>/O<inf>2</inf>
摘要： The paper describes a model of plasma chemical etching of silicon in CCl2F2/O2 plasma with teflon coating of the reactor walls. It is established that the chlorine atoms lead to a shift in the maximum of the dependence of the etching rate of silicon on the oxygen content in the gas mixture to ~ 90%, in comparison with fluorine containing plasmas. It is shown that the proposed model of the process explains all the currently known experimental data for CCl2F2/O2 plasma. The model is applicable to other chlorine containing mixtures, at least when silicon is etched.
关键词： Plasma chemical etching,silicon,nanoelectronics,FinFET technology
更新于2025-09-19 17:15:36
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[IEEE 2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) - Austin, TX (2018.9.24-2018.9.26)] 2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) - Analysis of the Effect of Field Enhancement at Fin Corners on Program Characteristics of FinFET Split-Gate MONOS
摘要： The effect of field enhancement at Fin corners on program characteristics of FinFET Split-gate metal oxide nitride oxide silicon (SG-MONOS) is analyzed. The program characteristics using source-side injection (SSI) are found to be insensitive to the variation of the curvature radius at Fin corners, which shows the robustness of FinFET SG-MONOS to Fin shape variation in the fabrication process.
关键词： FinFET,MONOS
更新于2025-09-19 17:15:36
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[IEEE 2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) - Udine, Italy (2019.9.4-2019.9.6)] 2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) - Impact of BEOL Design on Self-heating and Reliability in Highly-scaled FinFETs
摘要： This paper investigates the impact of BEOL design on device and backend reliability – HCI, BTI, EM – due to dependence of self-heating on BEOL in highly-scaled FinFETs. Our analysis indicates that due to poor thermal coupling to substrate – in the thin fin body devices – a large part of heat flows out of BEOL. This makes self-heating, and thus device (FEOL) temperature, very sensitive to BEOL design. The heat flow through BEOL also significantly increases the metal and via temperatures. The increased temperature negatively affects the overall reliability, and one of the ways to mitigate device degradation is optimization of BEOL design.
关键词： Self-heating effect,HCI,FinFET,Reliability,BTI,EM,Impact of BEOL design,Aging
更新于2025-09-12 10:27:22
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Polarization Dependence of Pulsed Laser-Induced SEEs in SOI FinFETs
摘要： Pulsed current laser-induced measurements on SOI FinFETs at sub-bandgap wavelength (1260 nm) are affected by the polarization of the laser light used in the experimental testing setup. Such a polarization dependence is not observed during pulsed laser single event effects testing on large area silicon diodes, suggesting that the polarization dependence arises due to the presence of the nanoscale fin. Plasmonic enhancement is proposed as a likely mechanism for the polarization effects due to the metal/dielectric interfaces in the fin region. The observed polarization dependence has ramifications for collection and interpretation of data acquired by pulsed laser testing. Device orientation of FinFETs and other nanoscale devices during pulsed laser testing should be considered in order to ensure consistent testing conditions and reproducible measurement results across multiple measurement campaigns.
关键词： Pulsed laser,FinFET,single-event effects,single-event transients
更新于2025-09-12 10:27:22