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An 82-m 9 Gb/s PAM4 FSO-POF-UWOC Convergent System
摘要： With the increasing demands in free-space/underwater environmental monitoring, disaster precaution, and manufacturing industry applications, free-space optical (FSO)-plastic optical fiber (POF)-underwater wireless optical communication (UWOC) convergence is designed to be a promising framework for providing long-haul free-space with underwater links. An 82-m 9 Gb/s four-level pulse amplitude modulation (PAM4) system employing a 405-nm blue-light injection-locked laser diode (LD) is thereby offered and practically demonstrated. Results reveal that a 1.8-GHz 405-nm blue-light injection-locked LD can be effectively applied for a 9 Gb/s PAM4 signal transmission over 50 m FSO link, 30 m graded-index (GI)-POF transportation, and 2 m clear ocean underwater channel. To the authors’ understanding, this study is the first to practically build an 82-m 9 Gb/s PAM4 FSO-POF-UWOC convergent system that effectively constructs a long-haul optical wireless-wired-wireless link using doublet lenses, GI-POF, and optical beam reducer. The performances of the proposed convergent systems are analyzed by bit error rate and non-return-to-zero eye diagram in real-time over an 82-m transport. This framework is the leading one to establish a long-haul FSO-POF-UWOC convergent system with qualified transmission performances. It guides a promising way to facilitate wide applications in the convergence of FSO, POF and UWOC.
关键词： Graded-index plastic optical fiber,Underwater wireless optical communication,Four-level pulse amplitude modulation,Free-space optical
更新于2025-09-23 15:23:52
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Decoding of 10-G Optics-Based 50-Gb/s PAM-4 Signal Using Simplified MLSE
摘要： A simpli?ed maximum likelihood sequence estimation (MLSE) based on Viterbi algorithm has been proposed. Experimental results show that compared with the conventional MLSE, the proposed algorithm saves the multiplication by 25% with no sensitivity penalty when the memory length of MLSE is 2 both in the 25 Gb/s nonreturn to zero and 50 Gb/s four-level pulse-amplitude modulation (PAM-4) transmission systems. In order to further reduce the number of multiplications in the 50 Gb/s PAM-4 transmission system, we use 75 taps of feed-forward equalization to equalize the received PAM-4 signal into duo-binary PAM-4 (DB-PAM-4) signal and then use MLSE with the memory length of 1 to decode, which improves the sensitivity performance by 1.8 dB and reduces the computing complexity by ～98% compared with conventional MLSE (L = 4) method. As a result, a 10-km C-band transmission of 50 Gb/s PAM-4 signal is achieved using optical transceivers with a combined 3-dB bandwidth of ～8 GHz, and only 107 multiplications are required by using our proposed simpli?ed algorithm for equalization.
关键词： feed-forward equalization (FFE),four-level pulse-amplitude modulation (PAM-4),Viterbi algorithm,Maximum likelihood sequence estimation (MLSE)
更新于2025-09-23 15:21:01
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A 56-Gb/s PAM4 Receiver With Low-Overhead Techniques for Threshold and Edge-Based DFE FIR- and IIR-Tap Adaptation in 65-nm CMOS
摘要： This paper presents a four-level pulse amplitude modulation (PAM4) quarter-rate receiver that efficiently compensates for moderate channel loss in a robust manner through background adaptation of the receiver thresholds and equalization taps. The front-end utilizes an input single-stage continuous-time linear equalizer (CTLE) to boost the main cursor and relax the pre-cursor cancellation requirement, requiring only a 2-tap pre-cursor feed-forward equalizer (FFE) on the transmitter side. A 2-tap decision feedback equalizer (DFE) follows that includes one finite impulse response (FIR) tap and one infinite impulse response (IIR) tap to cancel first post-cursor and long-tail inter-symbol interference (ISI), respectively. In addition to the per-slice main three data samplers, a single error sampler is utilized for background threshold control and an edge-based sampler performs both phase-locked loop (PLL)-based clock and data recovery (CDR) phase detection and generates information for background DFE tap adaptation. Fabricated in general purpose (GP) 65-nm CMOS, the 56-Gb/s receiver achieves 4.63 mW/Gb/s and compensates for up to 20.8-dB loss at a bit error rate (BER) < 10?12 when operated with a 2-tap FFE transmitter.
关键词： DFE adaptation,Decision feedback equalizer (DFE),threshold adaptation,receiver,infinite impulse response (IIR),four-level pulse amplitude modulation (PAM4),serial link
更新于2025-09-04 15:30:14