- 标题
- 摘要
- 关键词
- 实验方案
- 产品
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A long-range plasmonic optical waveguide corner mirror chip
摘要： We provide the experimental proof of concept of on-chip 90° corner waveguide arrays based on ultra-long-range surface plasmon polariton waveguides working in TM-polarization at 1.55 μm. The single-mode waveguides comprise a thin gold-photoresist core embedded into SU-8 claddings and show typical propagation loss of ~1 dB/mm. A prismatic cavity integrated into the cladding layers and aligned with the waveguide’s corner assures the total internal reflection. We present a fabrication method to integrate the waveguide corner mirror based on self-alignment of multiple lithography steps. This chip has potential as low-loss perpendicular interface for single-mode high speed communication interconnects.
关键词： Planar lightwave circuits,Plasmon,Optical interconnect,Integrated Waveguide,Plasmonic
更新于2025-09-23 15:19:57
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DEVELOPMENT OF AN EQUIVALENT CIRCUIT MODEL OF A FINITE GROUND COPLANAR WAVEGUIDE INTERCONNECT IN MIS SYSTEM FOR ULTRA-BROADBAND MONOLITHIC ICS
摘要： An equivalent circuit model of a ?nite ground plane coplanar waveguide (FGCPW) interconnect in a metal-insulator-semiconductor (MIS) system for an ultra-broadband monolithic IC is proposed and illustrated. An e?ective substrate considering Maxwell-Wagner Polarization is suggested and demonstrated. The method of modeling the weak skin e?ect of the conductor is presented. The accuracy of the equivalent circuit model is evaluated. This proposed FGCPW interconnect equivalent circuit model enables a quick and e?cient time domain simulation to estimate the time delay and bandwidth of ultra-broadband ICs.
关键词： FGCPW interconnect,MIS system,equivalent circuit model,weak skin effect,Maxwell-Wagner Polarization,ultra-broadband monolithic IC
更新于2025-09-23 15:19:57
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High-Speed On-Chip signaling: Voltage or Current-Mode?
摘要： In this paper, we investigate several on-chip signaling schemes. Specifically, we compare different voltage-mode (VM) and current-mode (CM) signaling schemes considering power, performance, and robustness. In addition, we propose a new CM signaling scheme that uses a simple NAND-NOR gate transmitter circuit and a current-comparator-based receiver circuit. We implemented each signaling scheme using a 45 nm CMOS technology. The extracted simulation results show that a traditional CM signaling scheme consumes 58–78% less power compared to a traditional buffered VM signaling scheme in the 1–3 GHz frequency range. Our proposed CM signaling scheme consumes up to 95% and 81% lower power compared to buffered VM and existing CM schemes, respectively. In addition, the proposed CM signaling scheme has 37–41% lower latency with similar slew-rates compared to the buffered signaling scheme.
关键词： Voltage-mode,Signaling,Low-power,Low-swing,Interconnect,Current-mode
更新于2025-09-19 17:15:36
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Research on a 3D Encapsulation Technique for Capacitive MEMS Sensors Based on Through Silicon Via
摘要： A novel three-dimensional (3D) hermetic packaging technique suitable for capacitive microelectromechanical systems (MEMS) sensors is studied. The composite substrate with through silicon via (TSV) is used as the encapsulation cap fabricated by a glass-in-silicon (GIS) reflow process. In particular, the low-resistivity silicon pillars embedded in the glass cap are designed to serve as the electrical feedthrough and the fixed capacitance plate at the same time to simplify the fabrication process and improve the reliability. The fabrication process and the properties of the encapsulation cap were studied systematically. The resistance of the silicon vertical feedthrough was measured to be as low as 263.5 m?, indicating a good electrical interconnection property. Furthermore, the surface root-mean-square (RMS) roughnesses of glass and silicon were measured to be 1.12 nm and 0.814 nm, respectively, which were small enough for the final wafer bonding process. Anodic bonding between the encapsulation cap and the silicon wafer with sensing structures was conducted in a vacuum to complete the hermetic encapsulation. The proposed packaging scheme was successfully applied to a capacitive gyroscope. The quality factor of the packaged gyroscope achieved above 220,000, which was at least one order of magnitude larger than that of the unpackaged. The validity of the proposed packaging scheme could be verified. Furthermore, the packaging failure was less than 1%, which demonstrated the feasibility and reliability of the technique for high-performance MEMS vacuum packaging.
关键词： vertical interconnect,capacitive,glass reflow,MEMS,3D encapsulation
更新于2025-09-19 17:15:36
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[Communications in Computer and Information Science] VLSI Design and Test Volume 892 (22nd International Symposium, VDAT 2018, Madurai, India, June 28-30, 2018, Revised Selected Papers) || Performance Analysis of Graphene Based Optical Interconnect at Nanoscale Technology
摘要： In the modern technology era, interconnect is the key element for designing integrated circuits that provides on-chip and off-chip communication path for various systems. The primary challenges for modeling interconnect are reduced propagation delay, power dissipation, and its power delay product at advanced technology. This paper critically addresses the performance of optical interconnects using equivalent electrical model that comprises of different composite materials. Using industry standard HSPICE, the propagation delay and power dissipation characteristics of graphene nanoribbon have been compared with other composite materials. It has been observed that the propagation delay for graphene nanoribbon can be improved by 99.91% as compared to other composite materials. The power delay product of the proposed graphene based interconnect model is 59.73% lesser compared to other composite materials at 22 nm technology node.
关键词： Power delay product (PDP),Graphene nanoribbons,Propagation delay,Optical interconnect,Power dissipation
更新于2025-09-19 17:15:36
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[IEEE 2019 18th International Conference on Optical Communications and Networks (ICOCN) - Huangshan, China (2019.8.5-2019.8.8)] 2019 18th International Conference on Optical Communications and Networks (ICOCN) - Compact silicon multicast switch for pCDC ROADM based on thermooptic Mach-Zehnder interferometers
摘要： We propose an optimized multicast switch for colorless, directionless and partially contentionless ROADM and experimentally demonstrate a 2×8 silicon multicast switch, which consists of six 3-dB multimode interference splitters and four Mach-Zehnder 2×2 optical switches.
关键词： Optical interconnect,multicast,silicon photonics,optical switches,CDC ROADM
更新于2025-09-16 10:30:52
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[IEEE 2019 18th International Conference on Optical Communications and Networks (ICOCN) - Huangshan, China (2019.8.5-2019.8.8)] 2019 18th International Conference on Optical Communications and Networks (ICOCN) - Five-port non-blocking silicon optical router based on mode-selective property
摘要： We propose and demonstrate a five-port optical router based on mode-selective property. It utilizes modes as labels to distinguish its routing paths. The optical signal-to-noise ratios for all paths are larger than 16.3 dB.
关键词： Optical interconnect,Silicon photonics,mode-division multiplexing,optical switching
更新于2025-09-16 10:30:52
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[IEEE 2019 TEQIP III Sponsored International Conference on Microwave Integrated Circuits, Photonics and Wireless Networks (IMICPW) - Tiruchirappalli, India (2019.5.22-2019.5.24)] 2019 TEQIP III Sponsored International Conference on Microwave Integrated Circuits, Photonics and Wireless Networks (IMICPW) - A Review on Substrate Integrated Waveguide Transitions
摘要： Substrate Integrated Waveguide (SIW) is the key technology for implementing of mm-wave integrated circuits and systems. A low loss, compact, flexible and cost-effective solution for integrating elements on the same substrate is made possible by SIW structures. Transitions play a major role in integrating the planar as well as non-planar devices with SIW. This paper presents the development and current research topics of SIW for planar and non-planar components. Future research trends are also discussed.
关键词： SIW Transition,SIW Interconnect transitions
更新于2025-09-16 10:30:52
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Electro-Optical Co-Design of Power-Efficient 100-Gbps/λ VCSEL Transmitter
摘要： In this paper, we propose a comprehensive electro-optical co-design framework for power-efficient high-speed VCSEL transmitter targeting at 50 Gbaud. The framework integrates a rate-equation based VCSEL chip model and driver circuit models. Subject to the transmitter specifications defined by IEEE 400G standard, the driver circuit design of NRZ and PAM-4 modulations, together with the energy efficiency of transmitter, is analyzed and compared for two types of 20-GHz class VCSELs with different damping factors while keeping the same parasitic parameters. For NRZ modulation, analysis results indicate that both types of VCSEL transmitters show similar achievable data rate and energy efficiency. Both types of VCSEL transmitters are beneficial with small driver resistance in order to achieve high-speed signaling integrity. The best energy efficiency for both types of VCSEL transmitters is 520.8 fJ/bit under NRZ modulation. For PAM-4 modulation, higher achievable data rate can be reached by the over-damped VCSEL transmitter compared with the under-damped one, for which trade-offs of choosing the appropriate driver parameters are required for high-speed operation. The optimized over-damped VCSEL transmitter can have 16.13% higher achievable data rate and around 4.12% of energy efficiency improvement compared with the under-damped counterpart, but the signal quality is more sensitive to driver parameters. The best energy efficiencies are 365.1 fJ/bit and 380.8 fJ/bit for the over- and under-damped VCSEL transmitter under PAM-4 modulation. This co-design framework can provide a guidance in the VCSEL enabled co-packaging design.
关键词： energy efficiency,optical interconnect,VCSEL transmitter,co-package,co-design
更新于2025-09-16 10:30:52
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Evaluation and optimisation of the SSAIL method for laser-assisted selective electroless copper deposition on dielectrics
摘要： Formation of electrical circuit traces on 3D shaped dielectrics is one of the biggest challenges in 3D Microscopic Integrated Devices (3D-MID). We have developed a new method called “Selective Surface Activation Induced by a Laser” (SSAIL), which is a promising technology for solving emerged production issues for electrical conductors on polymers. SSAIL contains 3 main steps: laser modification of the dielectric surface, chemical activation of the modified areas and electroless plating of the activated parts. In this paper, the route and results on optimisation of the SSAIL process by evaluating properties of the final metal-plated traces are provided. A special validation method of the technology based on the quality and reliability of the plating has been proposed. The sheet resistance, adhesion strength to the substrate and spatial selectivity of plated copper were used to find the optimal laser processing parameters.
关键词： Selective electroless plating,Laser activation,Moulded interconnect devices,Polymer,Electric circuit,Evaluation and optimisation
更新于2025-09-16 10:30:52