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Electrical characterization of high k-dielectrics for 4H-SiC MIS devices
摘要： We report promising results regarding the possible use of AlN or Al2O3 as a gate dielectric in 4H-SiC MISFETs. The crystalline AlN ?lms are grown by hot wall metal organic chemical vapor deposition (MOCVD) at 1100 °C. The amorphous Al2O3 ?lms are grown by repeated deposition and subsequent low temperature (200 °C) oxidation of thin Al layers using a hot plate. Our investigation shows a very low density of interface traps at the AlN/4H-SiC and the Al2O3/4H-SiC interface estimated from capacitance-voltage (CV) analysis of MIS capacitors. Current-voltage (IV) analysis shows that the breakdown electric ?eld across the AlN or Al2O3 is ～ 3 MV/cm or ～ 5 MV/cm respectively. By depositing an additional SiO2 layer by plasma enhanced chemical vapor deposition at 300 °C on top of the AlN or Al2O3 layers, it is possible to increase the breakdown voltage of the MIS capacitors signi?cantly without having pronounced impact on the quality of the AlN/SiC or Al2O3/SiC interfaces.
关键词： MIS structure,Interface traps,Al2O3/4H-SiC interface,AlN/4H-SiC interface
更新于2025-11-14 17:28:48
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Barrier height modification in Au/Ti/n-GaAs devices with a $$\hbox {HfO}_{2}$$HfO2 interfacial layer formed by atomic layer deposition
摘要： X-ray photoelectron spectroscopy has been carried out to characterize the surface of the hafnia (HfO2) thin films grown on n-GaAs wafer by atomic layer deposition, and the surface morphology of the HfO2 layer on GaAs has been analysed using atomic force microscopy. The barrier height (BH) values of 1.03 and 0.93 eV (300 K) for the Au/Ti/HfO2/n-GaAs structures with 3- and 5-nm HfO2 interfacial layers, respectively, have been obtained from the I–V characteristics of the devices, which are higher than the value of 0.77 eV (300 K) for the Au/Ti/n-GaAs diode fabricated by us. Therefore, it can be said that the HfO2 thin layer at the metal/GaAs interface can also be used for BH modification as a gate insulator in GaAs metal-oxide semiconductor (MOS) capacitors and MOS field-effect transistors. The ideality factor values have been calculated as 1.028 and 2.72 eV at 400 and 60 K; and as 1.04 and 2.58 eV at 400 and 60 K for the metal–insulating layer–semiconductor (MIS) devices with 3- and 5-nm interfacial layers, respectively. The bias-dependent BH values have been calculated for the devices by both Norde’s method and Gaussian distribution (GD) of BHs at each sample temperature. At 320 K, the (cid:2)b(V ) value at 0.70 V for a 3-nm MIS diode is about 1.08 eV from the (cid:2)b(V ) vs. V curve determined by the GD, and about 0.99 eV at 0.58 V for a 5-nm MIS diode. It has been seen that these bias-dependent BH values are in close agreement with those obtained by Norde’s method for the same bias voltage values.
关键词： metal–insulating layer–semiconductor (MIS) device,Barrier height modification and inhomogeneous,bias-dependent barrier height,temperature-dependent MIS diode parameters,atomic layer deposition (ALD)
更新于2025-09-23 15:23:52
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[IEEE 2018 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT) - Bangalore (2018.3.16-2018.3.17)] 2018 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT) - AlInN/GaN MIS-HEMTs with High Pressure Oxidized Aluminium as Gate Dielectric
摘要： AlInN/GaN metal insulator semiconductor high electron mobility transistor (MIS-HEMT) with high pressure oxidized aluminium as gate dielectric is investigated in this paper. The fabricated MIS-HEMT shows more than six orders of reduction in the gate leakage current in reverse bias and more than three orders of reduction in forward bias compared to the reference HEMT devices also fabricated on same substrates. A maximum drain current of 750 mA/mm was achieved due to improvement in the gate swing for MIS-HEMT. The MIS-HEMT devices also showed good improvement in the subthreshold slope and ID,ON/ID,OFF ratio compared to HEMT devices.
关键词： gate leakage current,MIS-HEMT,high pressure oxidation,AlInN/GaN,HEMT,Al2O3
更新于2025-09-23 15:23:52
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Electrical properties of 4H-SiC MIS capacitors with AlN gate dielectric grown by MOCVD
摘要： We report on the electrical properties of the AlN/4H-SiC interface using capacitance- and conductance-voltage (CV and GV) analysis of AlN/SiC MIS capacitors. The crystalline AlN layers are made by hot wall MOCVD. CV analysis at room temperature reveals an order of magnitude lower density of interface traps at the AlN/SiC interface than at nitrided SiO2/SiC interfaces. Electron trapping in bulk traps within the AlN is significant when the MIS capacitors are biased into accumulation resulting in a large flatband voltage shift towards higher gate voltage. This process is reversible and the electrons are fully released from the AlN layer if depletion bias is applied at elevated temperatures. Current-voltage (IV) analysis reveals that the breakdown electric field intensity across the AlN dielectric is 3–4 MV/cm and is limited by trap assisted leakage. By depositing an additional SiO2 layer on top of the AlN layer, it is possible to increase the breakdown voltage of the MIS capacitors significantly without having much impact on the quality of the AlN/SiC interface.
关键词： AlN/4H-SiC interface,MIS capacitors,Gate dielectrics
更新于2025-09-23 15:22:29
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High-quality SiN <sub/><i>x</i> </sub> / <i>p</i> -GaN metal-insulator-semiconductor interface with low-density trap states
摘要： We report on a high-quality p-GaN metal-insulator-semiconductor (MIS) capacitors with sharp interface morphology and the lowest interface trap density by using SiNx as the gate dielectric layer. Transmission electron microscopy and x-ray photoelectron spectroscopy (XPS) analysis revealed a high-quality interface morphology with the effective removal of carbon and oxygen impurities. Better than the interface properties of Al2O3, SiO2, and CaF2/p-GaN metal-oxide-semiconductor (MOS) or MIS capacitors, the capacitance-voltage measurements of SiNx/p-GaN showed negligible electrical hysteresis after a two-step surface pre-treatment, leading to the lowest trapped charge density of 5 × 10^10 cm^?2. The interface state density distribution was also reduced to be ~1–2 × 10^12 cm^?2 · eV^?1 at Et–Ev = 0.2–0.45 eV and 3–5 × 10^12 cm^?2 · eV^?1 near the valance-band edge after the treatments. The achievement of the high-quality MIS interface was attributed to the suppression of the Mg-Ga-O interfacial disordered layer by the effective surface treatments and oxygen-free deposition process, which was usually observed at Al2O3/p-GaN MOS interface.
关键词： p-GaN,MIS,interface
更新于2025-09-23 15:22:29
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Monolithic integration of E/D-mode GaN MIS-HEMTs on ultrathin-barrier AlGaN/GaN heterostructure on Si substrates
摘要： Monolithically integrated enhancement/depletion-mode (E/D-mode) GaN-based metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMTs) and inverters, were fabricated on an ultrathin-barrier (UTB) AlGaN/GaN heterostructure grown on Si substrates. By employing a graded AlGaN back barrier in the UTB-AlGaN/GaN heterostructure, a high threshold voltage (VTH) of +3.3 V is achieved in the E-mode MIS-HEMTs. The fabricated MIS-HEMT inverter features a high logic swing voltage of 7.76 V at a supply voltage of 8 V, a small VTH hysteresis as well as deviation less than 0.2 V. The UTB AlGaN/GaN-on-Si technology provides a good platform for integration of MIS-gate-based drivers and power transistors.
关键词： monolithic integration,ultrathin-barrier,GaN,E/D-mode,MIS-HEMT,inverter,AlGaN/GaN heterostructure,Si substrate
更新于2025-09-23 15:22:29
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[IEEE 2018 IEEE International Conference on Imaging Systems and Techniques (IST) - Krakow, Poland (2018.10.16-2018.10.18)] 2018 IEEE International Conference on Imaging Systems and Techniques (IST) - Real-Time 3D Reconstruction in Minimally Invasive Surgery with Quasi-Dense Matching
摘要： In this work, a method for 3D reconstruction of Minimally Invasive Surgery data in real-time is presented. It is formulated on top of the already established framework of Quasi-Dense Matching, optimizing its components for speed. First, it recovers a set of sparse features, which are matched robustly. Then, 3D information is propagated in a spatial neighbourhood, until similarity reaches a prede?ned threshold, to cover a semi-dense portion of operating ?eld domain. Matching on dense level is achieved with Zero Mean Normalized Cross Correlation metric to establish correspondences. The algorithm is able to recover disparity maps with relatively small error, while maintaining real-time performance.
关键词： CUDA,MIS,Disparity Estimation,Stereo Matching,3D Reconstruction
更新于2025-09-23 15:22:29
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[IEEE 2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC) - Shenzhen, China (2018.6.6-2018.6.8)] 2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC) - Characterization of Transient Threshold Voltage Shifts in Enhancement- and Depletion-mode AlGaN/GaN Metal-Insulator-Semiconductor (MIS)-HEMTs
摘要： Both enhancement- and depletion-mode AlGaN/GaN metal-insulator-semiconductor HEMTs were fabricated with Al2O3 as the gate dielectric formed by atomic layer deposition (ALD). With the common problems of threshold voltage hysteresis in AlGaN/GaN MIS-HEMTs, DC I-V and fast transient frequency-dependent C-V measurements were performed to characterize the threshold voltage shifts ?Vth and hence to systematically study the underlying mechanism. The experimental results reveal that ?Vth can be as high as 1.0 V at VG,max = 5 V in transient I-V measurements despite the much lower values of 0.42 V in static and CV measurements. This has significant implications in using AlGaN/GaN MIS-HEMTs for high voltage switching applications. Besides, multi-frequency C-V measurements show that the primary ?Vth is frequency independent but the second onset of voltage shifts (?V2) shows obvious frequency dependence. These results imply the likely mechanism of slow (deep) Al2O3 interface traps accounting for ?V1 hysteresis, and fast (shallow) interface traps accounting for ?V2.
关键词： AlGaN/GaN MIS-HEMT,Al2O3/III-N interface traps (fast and slow) and threshold voltage hysteresis.
更新于2025-09-23 15:21:21
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Interface charge engineering in down-scaled AlGaN (<6a??nm)/GaN heterostructure for fabrication of GaN-based power HEMTs and MIS-HEMTs
摘要： The physical mechanism for recovery of 2D electron gas (2DEG) in down-scaled AlGaN/GaN heterostructures with SiNx layers grown by low-pressure chemical vapor deposition (LPCVD) was investigated by means of Hall-effect characterization, scanning Kelvin probe microscopy (SKPM), and self-consistent Poisson–Schr€odinger calculations. Observations using SKPM show that the surface potential of the AlGaN/GaN heterostructure remained nearly unchanged ((cid:2)1.08 eV) as the thickness of the AlGaN barrier was reduced from 18.5 to 5.5 nm and likely originated from the surface pinning effect. This led to a signi?cant depletion of 2DEG from 9.60 (cid:3) 1012 to 1.53 (cid:3) 1012 cm(cid:4)2, as determined by Hall measurements, toward a normally OFF 2DEG channel. Based on a consistent solution of the Schr€odinger–Poisson equations and analytical simulations, approximately 3.50 (cid:3) 1013 cm(cid:4)2 of positive ?xed charges were con?rmed to be induced by a 20-nm LPCVD-SiNx passivation over the AlGaN/GaN heterostructures. The interface charge exerted a strong modulation of band bending in the down-scaled AlGaN/GaN heterostructure, contributing to the ef?cient recovery of 2DEG charge density ((cid:2)1.63 (cid:3) 1013 cm(cid:4)2). E-mode ultrathin-barrier AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistors with a low ON-resistance (RON), high ON/OFF current ratio, and steep subthreshold slope were implemented using LPCVD-SiNx passivation.
关键词： AlGaN/GaN heterostructure,power HEMTs,LPCVD-SiNx passivation,2D electron gas,MIS-HEMTs,interface charge engineering
更新于2025-09-23 15:19:57
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DEVELOPMENT OF AN EQUIVALENT CIRCUIT MODEL OF A FINITE GROUND COPLANAR WAVEGUIDE INTERCONNECT IN MIS SYSTEM FOR ULTRA-BROADBAND MONOLITHIC ICS
摘要： An equivalent circuit model of a ?nite ground plane coplanar waveguide (FGCPW) interconnect in a metal-insulator-semiconductor (MIS) system for an ultra-broadband monolithic IC is proposed and illustrated. An e?ective substrate considering Maxwell-Wagner Polarization is suggested and demonstrated. The method of modeling the weak skin e?ect of the conductor is presented. The accuracy of the equivalent circuit model is evaluated. This proposed FGCPW interconnect equivalent circuit model enables a quick and e?cient time domain simulation to estimate the time delay and bandwidth of ultra-broadband ICs.
关键词： FGCPW interconnect,MIS system,equivalent circuit model,weak skin effect,Maxwell-Wagner Polarization,ultra-broadband monolithic IC
更新于2025-09-23 15:19:57