- 标题
- 摘要
- 关键词
- 实验方案
- 产品
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Feasibility of 4H-SiC p-i-n Diode for Sensitive Temperature Measurements between 20.5 K and 802 K
摘要： For the first time, we report on the performances of 4H-SiC pin-diode temperature sensors for operating temperatures between 20.5 K and 802 K. In this huge temperature range three ranges of performance were identified with the limit temperatures at 78.2 K and 176.3 K. In each of these ranges a different dominant current transport mechanism is shown and in the manuscript a detailed analysis and discussion is reported. The sensor performances were extracted from VD-T characteristics at different fixed ID values. In particular, at ID=1 μA and in the temperature range between 78.2 K and 802 K, we found a sensor sensitivity of 2.3 mV/K up to 3.4 mV/K with a rms temperature error, eT, of less than 4.2 K and the sensor shows an excellent linearity – quantified by the coefficient of determination R2 higher than 0.9993. For even lower temperatures (below 78.2 K), low measurement currents like 10 nA are required leading to a sensitivity of 5.8 mV/K, but a lower linearity (R2=0.9095) and a rms temperature error of 9.7 K which makes the sensor only partially usable in the temperature range between 20.5 K and 78.2 K. Finally, the sensor performances are compared to other state-of-the-art solutions.
关键词： Semiconductor device modelling,Cryogenic temperatures,Temperature sensors,4H-Silicon Carbide device,High temperatures,Semiconductor p-i-n diodes
更新于2025-09-23 15:22:29
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[IEEE 2020 12th International Conference on Measuring Technology and Mechatronics Automation (ICMTMA) - Phuket, Thailand (2020.2.28-2020.2.29)] 2020 12th International Conference on Measuring Technology and Mechatronics Automation (ICMTMA) - Review on PD Ultrasonic Detection Using EFPI - Part I: the Optical Fiber Sensing Technologies
摘要： We report the development of multistrata subsurface laser-modified microstructure with backgrind-assisted controlled fracture for defect-free ultrathin die fabrication. This study focuses on the microstructural properties and formation mechanisms of the subsurface Si dislocation belt layer with respect to laser scanning speed, pulse laser energies, and interstrata distances. We optimize and exploit the multistrata interactions between generated thermal shock waves and the preceding dislocation belt layers formed to initiate frontal crack fractures that separate out the individual dies from within the interior of the wafer. A new partial-SD before grinding (p-SDBG) integration scheme based upon the tandem use of three-strata SD for controlled crack fracture toward the frontside of the wafer followed by static loading from backgrinding to complete full kerf separation is demonstrated. The optimized three-strata SD process and p-SDBG integration scheme can be used to compensate for the high backside reflectance wafers to produce defect-free eight die stacks of 25-μm-thick mechanically and 46-μm-thick electrically functional 2-D NAND memory dies.
关键词： laser,semiconductor device packaging,semiconductor memory,Defects,wafer dicing,semiconductor device manufacture
更新于2025-09-23 15:21:01
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[IEEE 2019 International Conference on Electrical, Electronics and Computer Engineering (UPCON) - ALIGARH, India (2019.11.8-2019.11.10)] 2019 International Conference on Electrical, Electronics and Computer Engineering (UPCON) - A Study on the Influence of Open Circuit Voltage (Voc) and Short Circuit Current (Isc) on Maximum Power Generated in a Photovoltaic Module/Array
摘要： A technique is described, to efficiently evaluate the reliability of an RF semiconductor device when several different mechanisms contribute simultaneously to its wearout. This is of interest for present-day GaN HEMT devices because symptoms of several simultaneous degradation mechanisms have been reported widely. The technique involves first finding DC parameters that are “signatures” of each mechanism. Then, separate DC-stress lifetests are performed to find the degradation rates for the signature parameters, at several temperatures, and the corresponding Arrhenius curves. Next, an RF-stress lifetest (with only one stress condition) is performed, while monitoring all of the signature parameters and the RF performance. This is utilized to determine the “scaling factors” between the rates of change in the DC lifetests and the rates of change in the RF application. Applying these scaling factors to the original Arrhenius curves gives an “overall” Arrhenius plot for the RF application with several different lines, for the different degradation mechanisms. The technique can be extended to further degradation mechanisms, by conducting further DC and RF lifetests while monitoring appropriate signature parameters.
关键词： semiconductor device reliability,lifetesting,gallium nitride,HEMTs,Failure analysis
更新于2025-09-23 15:19:57
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[IEEE 2019 IEEE International Ultrasonics Symposium (IUS) - Glasgow, United Kingdom (2019.10.6-2019.10.9)] 2019 IEEE International Ultrasonics Symposium (IUS) - Tiled Large Element 1.75D Aperture with Dual Array Modules by Adjacent Integration of PIN-PMN-PT Transducers and Custom High Voltage Switching ASICs
摘要： A technique is described, to efficiently evaluate the reliability of an RF semiconductor device when several different mechanisms contribute simultaneously to its wearout. This is of interest for present-day GaN HEMT devices because symptoms of several simultaneous degradation mechanisms have been reported widely. The technique involves first finding DC parameters that are “signatures” of each mechanism. Then, separate DC-stress lifetests are performed to find the degradation rates for the signature parameters, at several temperatures, and the corresponding Arrhenius curves. Next, an RF-stress lifetest (with only one stress condition) is performed, while monitoring all of the signature parameters and the RF performance. This is utilized to determine the “scaling factors” between the rates of change in the DC lifetests and the rates of change in the RF application. Applying these scaling factors to the original Arrhenius curves gives an “overall” Arrhenius plot for the RF application with several different lines, for the different degradation mechanisms. The technique can be extended to further degradation mechanisms, by conducting further DC and RF lifetests while monitoring appropriate signature parameters.
关键词： lifetesting,semiconductor device reliability,gallium nitride,Failure analysis,HEMTs
更新于2025-09-23 15:19:57
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[IEEE 2019 IEEE 16th International Conference on Group IV Photonics (GFP) - Singapore, Singapore (2019.8.28-2019.8.30)] 2019 IEEE 16th International Conference on Group IV Photonics (GFP) - Near Infrared Absorption Enhancement of Graphene for High-Responsivity Photodetection
摘要： As a key component in the wind turbine system, the power electronic converter and its power semiconductors suffer from complicated power loadings related to environment, and are proven to have high failure rates. Therefore, correct lifetime estimation of wind power converter is crucial for the reliability improvement and also for cost reduction of wind power technology. Unfortunately, the existing lifetime estimation methods for the power electronic converter are not yet suitable in the wind power application, because the comprehensive mission profiles are not well specified and included. Consequently, a relative more advanced approach is proposed in this paper, which is based on the loading and strength analysis of devices and takes into account different time constants of the thermal behaviors in power converter. With the established methods for loading and lifetime estimation for power devices, more detailed information of the lifetime-related performance in wind power converter can be obtained. Some experimental results are also included to validate the thermal behavior of power device under different mission profiles.
关键词： lifetime prediction,IGBT,power semiconductor device,thermal cycling,wind power,mission profiles
更新于2025-09-23 15:19:57
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Coexistence of quasi-CW and SBS-boosted self-Q-switched pulsing in ytterbium-doped fiber laser with low Q-factor cavity
摘要： As a key component in the wind turbine system, the power electronic converter and its power semiconductors suffer from complicated power loadings related to environment, and are proven to have high failure rates. Therefore, correct lifetime estimation of wind power converter is crucial for the reliability improvement and also for cost reduction of wind power technology. Unfortunately, the existing lifetime estimation methods for the power electronic converter are not yet suitable in the wind power application, because the comprehensive mission profiles are not well specified and included. Consequently, a relative more advanced approach is proposed in this paper, which is based on the loading and strength analysis of devices and takes into account different time constants of the thermal behaviors in power converter. With the established methods for loading and lifetime estimation for power devices, more detailed information of the lifetime-related performance in wind power converter can be obtained. Some experimental results are also included to validate the thermal behavior of power device under different mission profiles.
关键词： lifetime prediction,IGBT,power semiconductor device,thermal cycling,wind power,mission profiles
更新于2025-09-23 15:19:57
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[IEEE 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC) - Chicago, IL, USA (2019.6.16-2019.6.21)] 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC) - Quantification of spectral losses of Natural soiling and detailed microstructural analysis of Dust collected from Different locations in Dubai, UAE
摘要： We report the development of multistrata subsurface laser-modified microstructure with backgrind-assisted controlled fracture for defect-free ultrathin die fabrication. We study the microstructural properties and formation mechanisms of the subsurface Si dislocation belt layer with respect to laser scanning speed, pulse laser energies, and interstrata distances. We optimize and exploit the multistrata interactions between generated thermal shock waves and the preceding dislocation belt layers formed to initiate frontal crack fractures that separate out the individual dies from within the interior of the wafer. A new partial-SD before grinding (p-SDBG) integration scheme based upon the tandem use of three-strata SD for controlled crack fracture toward the frontside of the wafer followed by static loading from backgrinding to complete full kerf separation is demonstrated. The optimized three-strata SD process and p-SDBG integration scheme can be used to compensate for the high backside reflectance wafers to produce defect-free eight die stacks of 25-μm-thick mechanically and 46-μm-thick electrically functional 2-D NAND memory dies.
关键词： laser,semiconductor device packaging,semiconductor memory,Defects,wafer dicing,semiconductor device manufacture
更新于2025-09-19 17:13:59
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[IEEE 2019 44th International Conference on Infrared, Millimeter, and Terahertz Waves (IRMMW-THz) - Paris, France (2019.9.1-2019.9.6)] 2019 44th International Conference on Infrared, Millimeter, and Terahertz Waves (IRMMW-THz) - Realizing Asymmetric Boundary Conditions for Plasmonic THz Wave Generation in HEMTs
摘要： As a key component in the wind turbine system, the power electronic converter and its power semiconductors suffer from complicated power loadings related to environment, and are proven to have high failure rates. Therefore, correct lifetime estimation of wind power converter is crucial for the reliability improvement and also for cost reduction of wind power technology. Unfortunately, the existing lifetime estimation methods for the power electronic converter are not yet suitable in the wind power application, because the comprehensive mission profiles are not well specified and included. Consequently, a relative more advanced approach is proposed in this paper, which is based on the loading and strength analysis of devices and takes into account different time constants of the thermal behaviors in power converter. With the established methods for loading and lifetime estimation for power devices, more detailed information of the lifetime-related performance in wind power converter can be obtained. Some experimental results are also included to validate the thermal behavior of power device under different mission profiles.
关键词： power semiconductor device,lifetime prediction,thermal cycling,wind power,IGBT,mission profiles
更新于2025-09-19 17:13:59
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[IEEE 2019 IEEE Conference on Power Electronics and Renewable Energy (CPERE) - Aswan City, Egypt (2019.10.23-2019.10.25)] 2019 IEEE Conference on Power Electronics and Renewable Energy (CPERE) - Thermal Performance Evaluation of 1500-VDC Photovoltaic Inverters Under Constant Power Generation Operation
摘要： A technique is described, to efficiently evaluate the reliability of an RF semiconductor device when several different mechanisms contribute simultaneously to its wearout. This is of interest for present-day GaN HEMT devices because symptoms of several simultaneous degradation mechanisms have been reported widely. The technique involves first finding DC parameters that are “signatures” of each mechanism. Then, separate DC-stress lifetests are performed to find the degradation rates for the signature parameters, at several temperatures, and the corresponding Arrhenius curves. Next, an RF-stress lifetest (with only one stress condition) is performed, while monitoring all of the signature parameters and the RF performance. This is utilized to determine the “scaling factors” between the rates of change in the DC lifetests and the rates of change in the RF application. Applying these scaling factors to the original Arrhenius curves gives an “overall” Arrhenius plot for the RF application with several different lines, for the different degradation mechanisms. The technique can be extended to further degradation mechanisms, by conducting further DC and RF lifetests while monitoring appropriate signature parameters.
关键词： semiconductor device reliability,lifetesting,gallium nitride,HEMTs,Failure analysis
更新于2025-09-19 17:13:59
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[IEEE 2019 21st European Conference on Power Electronics and Applications (EPE '19 ECCE Europe) - Genova, Italy (2019.9.3-2019.9.5)] 2019 21st European Conference on Power Electronics and Applications (EPE '19 ECCE Europe) - Laser triggering of solid-state switches
摘要： A theoretical and experimental investigation has been made into the laser activated Silicon Controlled Rectifier (SCR) turn-on process. Thanks to the measurement of illumination profile of the thyristor gate and a one-dimensional commutation model, a prediction can be made of the temperature hotspots of the initially conducting area region adjacent to the gate. The improvement of switching characteristics with respect to the datasheet parameters for an electrically gated configuration will be demonstrated; 8-fold turn-on delay reduction and the rate of rise of the on-state current (di/dt) increased over 45 times at low pulse repetition rate, without destroying the device.
关键词： New switching devices,Thyristors,Photovoltaic,Switching losses,Particle accelerator,Transistor,Pulsed power,Semiconductor device
更新于2025-09-16 10:30:52