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Silicon carbide nanowire field effect transistors with high on/off current ratio
摘要： We report the important performance parameters of SiC-NWFET devices including on/off current ratio (Ion/Ioff), gating effect, transconductance (gm), and carrier mobility (μh). The channel length dependence of these key performance parameters of the SiC-NWFETs with varying channel lengths ranging from 120 nm to 1.5 μm has been demonstrated. The device with the 120 nm channel length has led to a very high on/off current ratio (1.34 × 10^4) and very strong gating effect. Furthermore, the transconductance and the hole mobility have been determined as 6.9 nS and 1.696 cm2/V·s, respectively, at Vds of 0.05 V. This study shows good promise of the SiC-NWFET devices to be used in advanced solid-state nanoelectronic devices capable of operating at high frequency and high temperature.
关键词： On/off current ratio,Transconductance,Gating effect,SiC-NWFETs
更新于2025-09-23 15:23:52
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[IEEE 2018 3rd International Conference On Internet of Things: Smart Innovation and Usages (IoT-SIU) - Bhimtal, India (2018.2.23-2018.2.24)] 2018 3rd International Conference On Internet of Things: Smart Innovation and Usages (IoT-SIU) - A 50 V Multi-Gate RF LMOS on InGaAs
摘要： In this paper, we present a 50 V RF power multi-gate LMOS (MG-LMOS) structure on InGaAs with p-type InP substrate. The proposed structure contains three n+-polysilicon gate electrodes placed in a trench and n+ InGaAs layer at bottom of epitaxial layer which act as a drain connected to the vertically extended drain contact at both ends of the device. The MG-LMOS generate parallel current flow through multi-channels in p-base from drain to source. The proposed structure enhances the drain current (ID ) which provide reduction in specific on-resistance (Ron,sp) with increase in transconductance (gm ) leads to provide improvement in cut-off frequency (fT ) and maximum oscillation frequency (fmax ). The MG-LMOS designed for Vbr of 50 V by using 2-D simulations, provides 3.9 times high ID , 5.4 times reduces the Ron,sp , 5.9 times development in gm , 2.1 times increment in fT , and 2.5 times improvement in fmax in comparison with conventional planer LMOS (CP-LMOS) for the equivalent cell pitch.
关键词： multi-channels,LMOS,Transconductance,Cut-off frequency,InGaAs
更新于2025-09-23 15:21:21
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[IEEE 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC) - Chicago, IL, USA (2019.6.16-2019.6.21)] 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC) - Annual energy yield analysis of solar cell technology
摘要： This paper presents a systematic procedure that can be used to create operational transconductance amplifiers (OTAs) for closed-loop operation using multiple low-gain stages to realize extremely high DC gain. Such devices are necessary to realize analog functions with demanding absolute accuracy requirements, e.g., high-resolution ADCs and DACs. The principle is based on the cascade of undamped integrators to realize large DC gains and a state-space derived controller to stabilize its operation in a closed-loop configuration. A programmable OTA fabricated in the IBM 130 nm CMOS process is used as a test vehicle to prove the design principle through its 2 to 5th-order realization. Measured data reveals DC gains ranging from 50 to 150 dB with a 3-dB bandwidth of 10 kHz and a unity gain frequency of 10 MHz. While this paper demonstrates the design principles using CMOS integrated circuits, the principle is general and can be applied to any type of circuit technology in integrated or discrete implementation. Moreover, the methods are easily automated as the principles are based on closed-form formulae as opposed to iterative numerical search techniques.
关键词： integrated circuit implementation,Miller-C integrators,dominate-pole implementation,programmable amplifiers,Controller-based compensation,operational transconductance amplifiers (OTAs),discrete compensation,operational amplifiers (op-amps),ultra-high gain
更新于2025-09-19 17:13:59
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[IEEE 2018 Conference on Precision Electromagnetic Measurements (CPEM 2018) - Paris, France (2018.7.8-2018.7.13)] 2018 Conference on Precision Electromagnetic Measurements (CPEM 2018) - 1 V AC-DC Difference of a Thermal Transfer Standard Measured with a Pulsed Josephson Standard Unloaded by a Transconductance Amplifier
摘要： A transconductance amplifier (TCA) with a negative admittance has been used in parallel with a commercial thermal transfer standard (TTS) to unload the voltage source, a pulse-driven AC Josephson Voltage Standard (also known as Josephson Arbitrary Waveform Synthesizer or JAWS). AC-DC difference measurements at 1 V and at frequencies from 10 Hz to 10 kHz show excellent agreement with the values obtained by a conventional method. Expanded uncertainties between 0.28 μV/V and 0.39 μV/V (k=2), depending on the frequency, have been achieved.
关键词： thermal transfer standard,transconductance amplifier,AC-DC difference,pulse-driven,Josephson Arbitrary Waveform Synthesizer,Josephson Voltage Standard
更新于2025-09-10 09:29:36
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A New High-Gain Operational Amplifier Using Transconductance-Enhancement Topology Integrated with Metal Oxide TFTs
摘要： This paper presents an integrated operational amplifier (OPAMP) consisting of only n-type metal oxide thin-film transistors (TFTs). In addition to using positive feedback in the input differential pair, a transconductance-enhancement topology is applied to improve the gain of the OPAMP. The OPAMP has a voltage gain (Av) of 29.54 dB over a 3 dB bandwidth (BW) of 9.33 kHz at a supply voltage of 15 V. The unity-gain frequency, phase margin and DC power consumption (PDC) are 180.2 kHz, 21.5°PM and 5.07 mW, respectively.
关键词： transconductance-enhancement topology,Operational amplifier,positive feedback,metal oxide thin-film transistors (TFTs)
更新于2025-09-09 09:28:46
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Breakdown Voltage Enhancement in AlGaN/GaN High-Electron Mobility Transistor by Optimizing Gate Field-Plate Structure
摘要： We optimize various gate head structures to improve breakdown voltage characteristics of AlGaN/GaN high-electron mobility transistors by a two-dimensional device simulator based on a T-shaped gate-connected field-plate. Field-plates (FPs) alleviate electric field spikes near the gate and drain-side overlapping edges, which eventually disperse electron avalanche and charge trapping effects. Hence, the more uniform electric field distribution provides improved breakdown voltage of the device. Multiple configurations, such as extension of the FP towards the source or drain, and symmetric extension, were investigated and compared. The best results were acquired when the FP was extended towards the drain, with an optimum length of 2 μm, which produced maximum breakdown voltage of 224 V and maximum transconductance of 132.5 mS/mm. Also, the optimum Si3N4 passivation layer thickness based on a T-shaped gate-connected FP structure was 50 nm.
关键词： Voltage,High-Electron,Breakdown,Field-Plate,Transconductance,Transistor
更新于2025-09-04 15:30:14
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Analysis of Passivation Techniques in InP HEMTs and Implementation of an Analytical Model of <i>f</i> <sub/>T</sub> Based on the Small Signal Equivalent Circuit
摘要： This paper analyses, the influence of Si3N4-PECVD and Al2O3-ALD surface passivation on the DC and RF characteristics of InP HEMTs with different gate lengths 0.08 μm, 0.1 μm, 0.12 μm, and 0.15 μm. A significant improvement in maximum drain current IDS_MAX, transconductance gm_MAX and oscillation frequency fmax_MAX is obtained by scaling the thickness of the passivation layers An increase in gm_MAX and fmax_MAX, fT_MAX is observed by reducing parasitic capacitance w.r.t. the decrease in gate length. In addition, an analytical model of fT based on a small-signal equivalent circuit is developed, which consist of extrinsic parameters Rs, Rd, Cgs_ext and Cgd_ext and intrinsic parameters Cgsi, Cgdi, gmi and goi. The carrier transport is improved by increasing gmi, thus the transit time τt, the parasitic charging delay τext and the τpar are reduced by lowering the extrinsic capacitances. An excellent fitting between measured and simulated fT is achieved, which inturn leads a realistic way for further improvement in fT.
关键词： Passivation,Maximum Oscillation Frequency,Transconductance,Fabrication
更新于2025-09-04 15:30:14