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A Residual Phase Noise Compensation Method for IEEE 802.15.4 Compliant Dual-Mode Receiver for Diverse Low Power IoT Applications
摘要： The Internet of Things with its plethora of applications brings up new challenges in optimizing power consumption, error performance, latency and throughput in its communication devices. Recently, there has been increasing necessity of re-configurable and multi-standard transceivers in order to bring adaptability in the IoT devices to suit the nature of the application and satisfy the aforementioned performance metrics as well. In this work, we focus on the efficient design of receivers compliant with IEEE 802.15.4 which is a prominent protocol for low power IoT applications. We propose a robust phase noise compensation method which efficiently removes the residual phase noise remaining after the coarse frequency offset compensation due to direct-sequence spread spectrum operation on large packets. We also propose a dual-mode receiver using the proposed compensation method and showcase its ability to cater to the diverse nature of IoT applications. The detailed architecture of proposed dual-mode receiver is presented along with its FPGA prototyping and ASIC implementation. We have analyzed overall power consumption by the proposed dual-mode receiver considering the packet error rate and retransmission scenario. The results show that the proposed receiver saves significant energy consumption by changing its mode in favorable channel environments.
关键词： IEEE 802.15.4,IoT,dual-mode receiver,hardware architecture,phase noise cancellation,frequency and phase offset compensator,Digital baseband receiver
更新于2025-09-09 09:28:46
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[Institution of Engineering and Technology 12th European Conference on Antennas and Propagation (EuCAP 2018) - London, UK (9-13 April 2018)] 12th European Conference on Antennas and Propagation (EuCAP 2018) - Low-cost Hardware Platform for Angle of Arrival Estimation Using Compressive Sensing
摘要： Source localization using compressed sensing in indoor RF-based AoA localization has been theoretically studied in the past. These theoretical analysis has revealed that using compressive sensing techniques for small RF antenna arrays is feasible. In this paper we present a hardware architecture which implements the random projections needed for compressive sensing, implemented using 2-port and 4-port lumped Wilkinson power dividers. We introduce the hardware architecture and how the topology of the system can be altered to achieve the necessary decorrelation in the projection process. We illustrate the efficacy of our proposed approach through a source localization experiment.
关键词： hardware architecture,angle of arrival,RF localization,Wilkinson power dividers,compressed sensing
更新于2025-09-04 15:30:14