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Effect of Annealing Temperature on Morphology and Electrical Property of Hydrothermally-Grown ZnO Nanorods/ <i>p</i> -Si Heterojunction Diodes
摘要： In this study, ZnO nanorods (NRs) were synthesized using the hydrothermal method, and the effects of annealing temperature (150 °C–600 °C) on morphology, crystallinity, defects states of the NRs, and electrical property of the n-type ZnO NRs/p-type Si heterojunction diodes were investigated. No appreciable changes in the morphology and crystal structure of the ZnO NRs were observed with increasing annealing temperature up to 450 °C. As the temperature increased to 600 °C, the average length and diameter of the NRs decreased due to the partial melting and sintering in the NRs. From the X-ray photoelectron spectroscopy (XPS) results, the concentration of internal oxygen vacancies decreased with increasing annealing temperature to 450 °C due to thermal diffusion of oxygen vacancies to the surface. The electrical conductivity of the NRs increased to 450 °C, which was attributed to the increased crystallinity and low defects concentration (oxygen vacancy) in the NRs. Conversely, the electrical conductivity degraded at 600 °C due to the decreased effective contact area.
关键词： Annealing,Hydrothermal Process,pn Heterojunction,Electrical Conductivity,ZnO
更新于2025-09-04 15:30:14
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PTFE Additive and Re-annealing Effect on Thermoluminescence Response of CaSO <sub/>4</sub> :Dy Derived from Co-precipitation Method
摘要： Effect of PTFE (Polytetrafluoroethylene) addition and re-annealing treatment in thermoluminescent dosimeter (TLD) CaSO4:Dy was investigated. CaSO4:Dy was prepared by a co-precipitation method. The PTFE was added before re-annealing treatment which the mass ratio of CaSO4:Dy and PTFE was fixed to 2:3. The re-annealing treatments of the samples were done at temperature 700 C for 1 hr. The obtained samples were characterized using a Fourier-transform infrared (FTIR) and X-ray diffraction (XRD) to observe the molecule bonding in sample and crystal properties, respectively. From the experimental results, it was observed that the thermoluminescence intensity of CaSO4:Dy, CaSO4:Dy re-annealed at 700 C, and CaSO4:Dy + PTFE re-annealed at 700 C are 57.03, 75.15, and 1191.11 nC, respectively. The intensity of 700 C-re-annealed CaSO4:Dy increased significantly after PTFE addition.
关键词： re-annealing,thermoluminescence,CaSO4:Dy,dosimeter,PTFE
更新于2025-09-04 15:30:14
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PH SENSITIVITY DEPENDENCY ON THE ANNEALING TEMPERATURE OF SPIN-COATED TITANIUM DIOXIDE THIN FILMS
摘要： Titanium dioxide (TiO2) thin films were fabricated on indium tin oxide (ITO) glass substrates using the spin coating technique and further were implemented as sensing membranes of the extended gate field effect transistor (EGFET) based pH sensor. The as-deposited thin films were annealed at different temperatures from 200 - 600 °C in room ambient for 20 min. The effects of different annealing temperatures on electrical and crystalline properties were analyzed by I-V two point probes measurement and X-ray diffraction respectively. Meanwhile, the surface morphology of thin films was observed by field emission scanning electron microscope (FESEM). We then measured the transfer characteristics (ID-VG) of the TiO2/ITO sensing membrane using a semiconductor parametric device analyzer for sensor characterization. It was found that, TiO2/ITO sensing membrane annealed at 300 °C achieved higher sensitivity and good linearity of 51.48 mV/pH and 0.99415, respectively in the pH buffer solutions of 4, 7, 10, and 12. Thin film annealed at 300 °C gives higher conductivity thin film of 384.62 S/m. We found that the conductivity of TiO2/ITO thin films was proportional with the sensitivity of sensing membrane.
关键词： titanium dioxide,Annealing temperature,sol-gel spin coating,extended gate field effect transistor
更新于2025-09-04 15:30:14
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The Post Annealing to Control the Number of Layers of 2D MoS2 and SnS2
摘要： We have demonstrated that post annealing could control the layer thickness of 2D MoS2 and SnS2 films transferred on a SiO2/Si substrate by varying the annealing temperature and time. Atomic force microscopy and Raman spectroscopy characterizations revealed that higher annealing temperature and longer treatment time led to thinner films, lower residues and fewer impurities on the surface of 2D materials. In addition, a higher possibility to attain few-layers on both 2D films was achieved using post annealing. The multiple layers of pristine films having the thickness over 15 nm were reduced down to bi-layers after annealing. We observed that the moderate annealing temperature of 450 °C on led to effective layer-thinning compared to the films annealed at 340 °C. The post annealing at 450 °C produced very smooth few-layers (≤4 nm thickness, >1 μm size) of 2D MoS2 and SnS2. However, the 2D films decomposed or disappeared at temperature greater than 650 °C. In addition, process time also affected the number of layers and the sweet spot turned out to be 2 to 3 hours in our experiment.
关键词： Annealing,Mechanical Exfoliation,Layer-Thinning,2D Materials,SnS2,MoS2
更新于2025-09-04 15:30:14
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Lack of correlation between C-V hysteresis and capacitance frequency dispersion in accumulation of metal gate/high- <i>k</i> /n-InGaAs metal-oxide-semiconductor stacks
摘要： The correlation between capacitance-voltage hysteresis and accumulation capacitance frequency dispersion of metal gate/high-k/n-InGaAs metal-oxide-semiconductor stacks is experimentally assessed. Samples fabricated employing forming gas annealing (FGA) or substrate air exposure to obtain different densities of defects were thoroughly characterized and the results were compared with previous literature on the topic. Results indicate a lack of correlation between capacitance-voltage hysteresis and accumulation capacitance dispersion with frequency, suggesting that defects with remarkably different kinetics are involved in each phenomenon. This is assessed through the dependence of the capacitance-voltage hysteresis with DC bias and stress time, observing that permanent interface defect depassivation under bias has no effect on the hysteresis width after stress. Overall, capacitance-voltage hysteresis probes slow trapping mechanisms throughout the oxide and the bandgap, which are consistent with the negative charge trapping characteristic of the current-time curves for FGA samples at constant voltage stress. Instead, accumulation capacitance frequency dispersion probes defects with short trapping/detrapping characteristic times that can be linked to the stress induced leakage current of air exposed samples under constant DC stress. Experimental results indicate that each effect must be assessed separately due to the large difference in the kinetics of the probed defects.
关键词： metal-oxide-semiconductor stacks,forming gas annealing,defects,metal gate/high-k/n-InGaAs,trapping mechanisms,capacitance-voltage hysteresis,accumulation capacitance frequency dispersion
更新于2025-09-04 15:30:14
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Stabilization of ferroelectric Hf <sub/>x</sub> Zr <sub/>1?x</sub> O <sub/>2</sub> films using a millisecond flash lamp annealing technique
摘要： We report on the stabilization of ferroelectric HfxZr1?xO2 (HZO) films crystallized using a low thermal budget millisecond flash lamp annealing technique. Utilizing a 120 s 375 ?C preheat step combined with millisecond flash lamp pulses, ferroelectric characteristics can be obtained which are comparable to that achieved using a 300 s 650 ?C rapid thermal anneal. X-ray diffraction, capacitance voltage, and polarization hysteresis analysis consistently point to the formation of the ferroelectric phase of HZO. A remanent polarization (Pr) of ～21 μC/cm2 and a coercive field (Ec) of ～1.1 MV/cm are achieved in 10 nm thick HZO layers. Such a technique promises a new alternative solution for low thermal budget formation of ferroelectric HZO films.
关键词： low thermal budget,ferroelectric HfxZr1?xO2 films,remanent polarization,ferroelectric phase,millisecond flash lamp annealing,coercive field
更新于2025-09-04 15:30:14