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oe1(光电查) - 科学论文

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?? 中文(中国)
  • An FPGA-Based Backend System for Intravascular Photoacoustic and Ultrasound Imaging

    摘要: The integration of intravascular ultrasound (IVUS) and intravascular photoacoustic (IVPA) imaging produces an imaging modality with high sensitivity and specificity which is particularly needed in interventional cardiology. Conventional side-looking IVUS imaging with a single-element ultrasound (US) transducer lacks forward-viewing capability, which limits the application of this imaging mode in intravascular intervention guidance, Doppler-based flow measurement, and visualization of nearly or totally blocked arteries. For both side-looking and forward-looking imaging, the necessity to mechanically scan the US transducer limits the imaging frame rate, and therefore array-based solutions are desired. In this paper, we present a low-cost, compact, high-speed, and programmable imaging system based on a field-programmable gate array (FPGA) suitable for dual-mode forward-looking IVUS/IVPA imaging. The system has 16 US transmit and receive channels and functions in multiple modes including interleaved photoacoustic (PA) and US imaging, hardware-based high-frame-rate US imaging, software-driven US imaging, and velocity measurement. The system is implemented in the register-transfer level, and the central system controller is implemented as a finite state machine. The system was tested with a capacitive micromachined ultrasonic transducer (CMUT) array. A 170-frames-per-second (FPS) US imaging frame rate is achieved in the hardware-based high-frame-rate US imaging mode while the interleaved PA and US imaging mode operates at a 60-FPS US and a laser-limited 20-FPS PA imaging frame rate. The performance of the system benefits from the flexibility and efficiency provided by low-level implementation. The resulting system provides a convenient backend platform for research and clinical IVPA and IVUS imaging.

    关键词: software/hardware co-design,velocity measurement,ultrasound imaging,Photoacoustic imaging,FPGA,data acquisition,finite state machine

    更新于2025-09-10 09:29:36