- 标题
- 摘要
- 关键词
- 实验方案
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[IEEE 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC) - Chicago, IL, USA (2019.6.16-2019.6.21)] 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC) - Autonomous Path Planning by Unmanned Aerial Vehicle (UAV) for Precise Monitoring of Large-Scale PV plants
摘要： This paper presents a 3.6 GHz low-noise fractional-N digital phase-locked loop (PLL) that achieves low in-band phase noise. Phase detection is carried out by a proposed 10-bit, 0.8 ps resolution time-to-digital converter (TDC) using a charge pump and a successive-approximation-register analog-to-digital converter (SAR-ADC) with low power and small area. The latency of the TDC is addressed by the designed building blocks. The fractional spurs are reduced by dual-loop least-mean-square (LMS) calibration. A (cid:2)(cid:3)-less and MOS varactor-less LC digitally-controlled oscillator (DCO) is proposed whose frequency resolution is enhanced to 7 kHz (or a unit variable capacitance of 2.6 aF) using a bridging capacitor technique. A prototype chip is fabricated using a 65 nm CMOS process, occupying an active area of 0.38 mm2 and consuming a power of 9.7 mW at a reference frequency of 50 MHz. The measured in-band phase noise is 107.8 dBc/Hz to 110.0 dBc/Hz with a loop bandwidth of 1 to 5 MHz.
关键词： digitally controlled oscillator (DCO),least-mean-square (LMS),digital phase-locked-loop (PLL),time-to-digital converter (TDC),successive-approximation-register analog-to-digital converter (SAR-ADC),frequency synthesizer,CMOS,sub-picosecond resolution
更新于2025-09-23 15:19:57
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[IEEE 2018 International Conference on Smart Grid and Clean Energy Technologies (ICSGCE) - Sg. Long, Cheras, Kajang, Malaysia (2018.5.29-2018.6.1)] 2018 International Conference on Smart Grid and Clean Energy Technologies (ICSGCE) - A Novel Five-Level Inverter Topology with Reactive Power Control for Grid-Connected PV System
摘要： These days multilevel inverters are more popular for grid-connected photovoltaic (PV) systems due to their low cost and high efficiency, as they effectively reduce total harmonic distortion (THD) and electromagnetic interference which results leakage current. Traditional multi-level inverters can only inject real power that cannot provide quality output power. A new international standard VDE-AR-N4105 states that for a grid tied inverter of power rating below 3.68kVA, a power factor (PF) of 0.95 leading to 0.95 lagging should be achieved. So, in this paper the proposed five-level inverter topology for grid-tie PV is controlled using a reactive power control method that ensures higher efficiency while enhancing the stability of the system. The proposed closed loop reactive power control technique additionally provides the ability to inject reactive power into the system. In this proposed topology the reactive power flow standard of operation is explained in details in relation to the proposed multi-level inverter topology. To validate the accuracy of the theoretical analysis, the control technique was applied to the existing multi-level inverter topology and then has been simulated in MATLAB/Simulink software. Comparisons were done on the basis of using and not using PLL for the existing multilevel topology and it is found that, synchronization is achieved with current and voltage if PLL is used, as a result PF is maintained close to unity whereas without PLL the PF decreases. Moreover the five-level output provides a much better output and better PF then other existing topologies.
关键词： phase-locked loop (PLL),multi-level inverters,solar PV,reactive power control
更新于2025-09-23 15:19:57
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Collaborative Fault Detection for Large-scale Photovoltaic Systems
摘要： The synchronous reference frame phase-locked loop (SRF-PLL) is widely used for synchronization applications. However, it suffers from a poor performance under unbalanced and distorted grid conditions. To improve the filtering capability of SRF-PLL, moving average filter (MAF) is incorporated into its control loop at the cost of a slow transient response of PLL in recently published literature. To further improve their dynamic performance without compromising the disturbance rejection capability and stability, a novel PLL based on quasi-type-1 PLL structure is proposed in this paper. A complex notch filter is incorporated into the QT1-PLL to eliminate the fundamental frequency negative sequence voltage component. The window length of MAF in QT1-PLL is reduced. And MAF is responsible for rejecting the rest of harmonics. Parameter design guidelines are suggested to obtain the minimum settling time for both phase jump and frequency jump. The proposed PLL provides a faster transient response with higher stability margins. The effectiveness of the proposed PLL is confirmed through simulation and experimental results and comparison with advanced PLLs.
关键词： Phase-locked loop (PLL),complex-vector filter,synchronization,moving average filter (MAF)
更新于2025-09-16 10:30:52
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[IEEE 2018 International Conference on Control, Power, Communication and Computing Technologies (ICCPCCT) - Kannur,Kerala, India (2018.3.23-2018.3.24)] 2018 International Conference on Control, Power, Communication and Computing Technologies (ICCPCCT) - Proportional Resonant Based Current Control Of Three-Phase Single Stage Grid Connected PV System
摘要： This paper presents an analysis of Proportional Integral (PI) controller based current control strategy and a Proportional Resonant (PR) controller based current control strategy for a three phase single stage grid connected PV system. PR controller has an advantage of tracking sinusoidal reference current without steady state error. It eliminates the number of coordinate transformation and reduces the complexity of control. It also reduces the current harmonics effectively and injects high quality power to the grid. The system is simulated using MATLAB and the results demonstrate that the PR based control strategy exhibits an excellent performance in tracking the reference current and in reducing the Total Harmonic Distortion (THD) in the current spectrum compared to the PI based control strategy.
关键词： PI controller,Grid connected PV system,PR controller,Phase Locked Loop (PLL)
更新于2025-09-04 15:30:14