研究目的
Investigating the development of a novel low-loss depletion type electro-optic phaseshifter (EOP) for silicon photonic integrated circuits (PICs) that combines low optical losses with low electrical power consumption.
研究成果
The proposed bi-junction depletion type EOP achieves a significant reduction in insertion losses (IL) and power consumption, making it suitable for low-speed applications. The devices are compatible with standard silicon photonic processes and could enable broad industrial deployment of silicon photonics in industrial metrology and automotive applications.
研究不足
The proposed devices increase the contact resistance and response time, making them optimized for low-speed applications. The devices were taped-out in a standard MPW-PIC run and are pending measurements.
1:Experimental Design and Method Selection:
The study proposes a novel bi-junction depletion type EOP with a doping cross section resembling a bi-junction transistor, designed to increase the overlapping area of the optical mode with variable depletion regions.
2:Sample Selection and Data Sources:
The devices were simulated using Silvaco Atlas? and Lumerical Mode?, and measurements of a conventional PN junction modulator were used to verify the model.
3:List of Experimental Equipment and Materials:
The study utilized standard MPW-PIC run for taping out the proposed devices.
4:Experimental Procedures and Operational Workflow:
The devices were designed to require only alteration to doping windows in a layout, achievable with already available PIC technologies.
5:Data Analysis Methods:
The study analyzed insertion losses (IL) at zero voltage and compared the performance of the proposed bi-junction EOP with conventional PN modulators.
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