摘要： This paper presents a 64 × 2 channel stereo-audio sensing front end with parallel asynchronous event output inspired by the biological cochlea. Each binaural channel performs feature extraction by analog bandpass filtering, and the filtered signal is encoded into events via asynchronous delta modulation (ADM). The channel central frequencies f0 are geometrically scaled across the human hearing range. Two design techniques are highlighted to achieve the high system power efficiency: source-follower-based bandpass filters (BPFs) and asynchronous delta modulation (ADM) with adaptive self-oscillating comparison. The chip was fabricated in 0.18 μm 1P6M CMOS, and occupies an area of 10.5×4.8 mm2. The core cochlea system operating under a 0.5 V power supply consumes 55 μW at an output rate of 100k event/s. The measured range of f0 is from 8 Hz to 20 kHz, and the BPF quality factor Q can be tuned from 1 to almost 40. The 1σ mismatch of f0 and Q between two ears is 3.3% and 15%, respectively, across all channels at Q ≈ 10. Reconstruction of speech input from the event output of the chip is performed to validate the information integrity in event-domain representation, and vowel discrimination is demonstrated as a simple application using histograms of the output events. This type of silicon cochlea front end targets integration with embedded event-driven processors for low-power smart audio sensing with classification capabilities, such as voice activity detection and speaker identification.