研究目的
To demonstrate a ferroelectric van der Waals heterostructure (vdWHs) device based on MoS2/h-BN/CIPS with a dual-gated structure which can work as a ferroelectric nonvolatile memory and a programmable rectifier.
研究成果
The integration of 2D ferroelectric crystals with other TMDs is promising for future multifunctional electronic applications, demonstrating high-performance nonvolatile memory and programmable rectifier functionalities.
研究不足
The high voltages needed to flip the polarization of CIPS due to the thick SiO2 gate dielectric layer. The size of the device becomes larger due to the series of processing steps.
1:Experimental Design and Method Selection:
The study involves the construction of dual-gated 2D ferroelectric vdWHs using MoS2, h-BN, and CIPS. The insertion of h-BN and the dual-gated coupling device configuration are used to stabilize and polarize ferroelectric CIPS.
2:Sample Selection and Data Sources:
Multilayer MoS2, h-BN, and CIPS flakes are exfoliated from bulk materials and transferred onto a SiO2/n+-Si substrate.
3:List of Experimental Equipment and Materials:
The fabrication involves standard electron beam lithography (EBL) and thermal evaporation for electrode deposition. Raman spectroscopy and atomic force microscopy (AFM) are used for characterization.
4:Experimental Procedures and Operational Workflow:
The device fabrication includes transferring MoS2, h-BN, and CIPS flakes onto the substrate, defining electrodes, and depositing a metal top gate. Electrical properties are characterized under high vacuum.
5:Data Analysis Methods:
The performance of the device as nonvolatile memory and programmable rectifier is evaluated through electrical measurements, including transfer characteristic curves and output characteristic curves.
独家科研数据包,助您复现前沿成果,加速创新突破
获取完整内容-
MoS2
HQ Graphene
Channel material in the ferroelectric vdWHs device
-
h-BN
Insulating layer to stabilize the polarization of CIPS and improve device performances
-
CuInP2S6 (CIPS)
SPI
Ferroelectric dielectric layer in the device
-
Cr/Au
8/20 nm, 8/60 nm
Electrodes and top gate material
-
SiO2/n+-Si substrate
Substrate for device fabrication
-
Electron beam lithography (EBL)
Nova 200 NanoLab
Used for defining electrodes
-
Atomic force microscopy (AFM)
Veeco Multimode
Used for thickness measurement of the flakes
-
Raman spectroscopy
Renishaw InVia
Used for quality definition of MoS2 and CIPS
-
Manual probe station
Lakeshore, TTP4
Used for electrical properties characterizations
-
Semiconductor characterization system
Keithley 4200
Used for electrical properties characterizations
-
登录查看剩余8件设备及参数对照表
查看全部