1：Experimental Design and Method Selection:

The study involves the preparation of dual gated few-layer MoS2 FETs with ZrO2 or h-BN as gate dielectrics and a buried SiO2 layer. X-ray irradiation was performed on these MoS2 transistors as a function of applied bias. Low-frequency noise measurements were performed as a function of temperature to provide insight into the nature and energy distribution of defects and radiation-induced charge trapping in these devices. Density functional theory calculations were used to explore the nature of the defects.

2：Sample Selection and Data Sources:

Multi-layer MoS2 transistors were constructed on a bulk Si wafer with 260 nm thermally-grown SiO2. For each device, between 3-10 layers of MoS2 were mechanically exfoliated on SiO

3：For each device, between 3-10 layers of MoS2 were mechanically exfoliated on SiOList of Experimental Equipment and Materials:

2. 3. List of Experimental Equipment and Materials: The gate dielectric was either 9 nm ZrO2 deposited using atomic layer deposition (ALD) or 2D h-BN added by layer transfer. Source, drain, and gate metal electrodes were patterned using e-beam lithography, followed by e-beam evaporation of Ni (50 nm).

4：Experimental Procedures and Operational Workflow:

MoS2 transistors were irradiated with 10-keV X-rays at a dose rate of 30.3 krad(SiO2)/min at 295 K with applied top gate biases of +1 V, 0 V, or -1 V and all other terminals grounded, including the back gate. Id-Vg characteristics were monitored using a HP 4156A Semiconductor Parameter Analyzer.

5：3 krad(SiO2)/min at 295 K with applied top gate biases of +1 V, 0 V, or -1 V and all other terminals grounded, including the back gate. Id-Vg characteristics were monitored using a HP 4156A Semiconductor Parameter Analyzer. Data Analysis Methods:

5. Data Analysis Methods: Low-frequency noise measurements were performed before and after irradiation from 85 to 400 K. Density functional theory calculations were performed to provide insight into the pertinent defects.