研究目的
To investigate the trapping behavior at the surface and in the core of triangular-shaped one-dimensional (1D) array of GaN nanowire gate-all-around field effect transistor (GAA FET) using capacitance, conductance, and noise measurements, and to understand its effects on device performance.
研究成果
The trapping and low-frequency noise characteristics of the GaN nanowire GAA FET are significantly influenced by surface and core traps. The device shows good performance with high Ion/Ioff ratio (~10^8) and low subthreshold swing (70 mV/dec). Trap behavior varies with operating region: accumulation region dominated by 1/f noise from shallow surface traps, surface depletion region shows transition to 1/f2 noise from deep traps, and deep-subthreshold region has G-R noise from core traps with lower cutoff frequencies. These findings are crucial for developing high-performance GaN-based nanoelectronic devices.
研究不足
The study is limited to room temperature measurements and specific device geometry (triangular-shaped nanowire with 64 fingers). The top-down fabrication process may introduce defects, and the low field-effect mobility (9.3 cm2·V?1·s?1) indicates potential issues with crystal quality or polarization effects. The noise measurements are confined to frequencies up to 10^4 Hz.
1：Experimental Design and Method Selection:
The study involves fabricating a GaN nanowire GAA FET using a top-down process and characterizing it through electrical measurements including current-voltage (I-V), capacitance-voltage (C-V), conductance-voltage (G-V), and low-frequency noise measurements to analyze trap behavior.
2：Sample Selection and Data Sources:
The device is fabricated on a GaN-on-insulator (GaNOI) wafer with a 150 nm GaN layer and 800 nm buried oxide on a sapphire substrate. The nanowire array consists of 64 triangular-shaped fingers with a gate length of 2 μm.
3：List of Experimental Equipment and Materials:
Equipment includes a high-resolution tunneling electron microscope (JEM-2100F, JEOL) for structural examination, a Source Measure Unit (B1500, Agilent) for I-V, C-V, and G-V measurements, and a fully automatic low-frequency noise monitoring system (Synergy Concepts) for noise measurements. Materials involve GaNOI wafers, poly(methyl methacrylate) for lithography, BCl3/Cl2 gas for plasma etching, TMAH etchant, Al2O3 and TiN for gate stack, Ti/Al/Ni/Au metal stack for contacts, and MOCVD for layer growth.
4：Experimental Procedures and Operational Workflow:
Fabrication steps include electron-beam lithography, plasma etching, TMAH treatment, sacrificial layer removal, MOCVD growth of AlGaN/GaN layers, deposition of gate oxide and metal, contact formation, and annealing. Electrical measurements are performed at room temperature with varying frequencies and gate biases.
5：Data Analysis Methods:
Data analysis includes using the Hill-Coleman method to estimate interface state density from C-V and G-V data, and fitting noise spectra to models involving 1/f and generation-recombination noise components to extract time constants.
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