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- 实验方案
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Programmable Spectral Filter in C-Band Based on Digital Micromirror Device
摘要： Optical ?lters have been adopted in many applications such as recon?gurable telecommunication switches, tunable lasers and spectral imaging. However, most of commercialized ?lters based on a micro-electrical-mechanical system (MEMS) only provide a minimum bandwidth of 25 GHz in telecom so far. In this work, the programmable ?lter based on a digital micromirror device (DMD) experimentally demonstrated a minimum bandwidth of 12.5 GHz in C-band that matched the grid width of the International Telecommunication Union (ITU) G.694.1 standard. It was capable of ?ltering multiple wavebands simultaneously and ?exibly by remotely uploading binary holograms onto the DMD. The number of channels and the center wavelength could be adjusted independently, as well as the channel bandwidth and the output power. The center wavelength tuning resolution of this ?lter achieved 0.033 nm and the insertion loss was about 10 dB across the entire C-band. Since the DMD had a high power handling capability (25 KW/cm2) of around 200 times that of the liquid crystal on silicon (LCoS) chip, the DMD-based ?lters are expected to be applied in high power situations.
关键词： digital micromirror device,optical switch,programmable spectral ?lter
更新于2025-11-28 14:23:57
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[IEEE 2018 International Flexible Electronics Technology Conference (IFETC) - Ottawa, ON, Canada (2018.8.7-2018.8.9)] 2018 International Flexible Electronics Technology Conference (IFETC) - A High Speed Programmable Ring Oscillator Using InGaZnO Thin-Film Transistors
摘要： This paper presents a high speed digitally programmable Ring Oscillator (RO) using Indium-gallium-zinc oxide thin-film transistors (IGZO TFTs). Proposed circuit ensures high speed compared to the conventional ROs using negative skewed scheme, in which each inverter delay is reduced by pre-maturely switching on/off the transistors. In addition, by controlling the load capacitance of each inverter through digital control bits, a programmable frequency of oscillation was attained. Proposed RO performance is compared with two conventional designs under same conditions. From simulation, it has been observed that the proposed circuit has shown a higher frequency of oscillations (283 KHz) compared to the conventional designs (76.52 KHz and 144.9 KHz) under same conditions. Due to the programmable feature, the circuit is able to generate 8 different linearly spaced frequencies ranging from 241.2 KHz to 283 KHz depending upon three digital control bits with almost rail-to-rail voltage swing. The circuit is a potential on-chip clock generator in many real-world flexible systems, such as, smart packaging, wearable devices, RFIDs and displays that need multi frequencies.
关键词： negative skewed and rail-to-rail logic,High speed programmable RO,Oxide TFTs
更新于2025-09-23 15:23:52
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FPGA-Based Implementation of an Artificial Neural Network for Measurement Acceleration in BOTDA Sensors
摘要： In recent years, using distributed fiber-optic sensors based on Brillouin scattering, for monitoring pipelines, tunnels, and other constructional structures have gained huge popularity. However, these sensors have a low signal-to-noise ratio (SNR), which usually increases their measurement error. To alleviate this issue, ensemble averaging is used which improves the SNR but in return increases the measurement time. Reducing the noise by averaging requires hundreds or thousands of scans of the optical fiber; hence averaging is usually responsible for a large percent of the entire system latency. In this paper, we propose a novel method based on artificial neural network for SNR enhancement and measurement acceleration in distributed fiber-optic sensors based on the Brillouin scattering. Our method takes the noisy Brillouin spectrums and improves their SNR by 20 dB, which reduces the measurement time significantly. It also improves the accuracy of the Brillouin frequency shift estimation process and its latency by more than 50% in comparison with the state-of-the-art software and hardware solutions.
关键词： Artificial neural network (ANN),digital signal processing,optical fibers,curve fitting,field-programmable gate arrays (FPGAs)
更新于2025-09-23 15:23:52
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[IEEE 2018 XIV International Scientific-Technical Conference on Actual Problems of Electronics Instrument Engineering (APEIE) - Novosibirsk, Russia (2018.10.2-2018.10.6)] 2018 XIV International Scientific-Technical Conference on Actual Problems of Electronics Instrument Engineering (APEIE) - Universal Control System of a Semiconductor Electric Energy Converter on Programmable Logic Devises
摘要： The article presents the results of the development of a universal control system for semiconductor power converters based on a programmable logic devices (PLD). As a result of the work done, shared functional modules for the various control systems of semiconductor converters were determined, the features of implementing modules on programmable logic were considered, and the algorithms for controlling converters on mathematical models were studied. The principal circuit diagram of the universal control system of the converter is synthesized on the basis of a combination of programmable logic devises and a microcontroller. The topologies of printed circuit boards and their layout in a single module of the universal control system of the converter are developed; the built-in microcontroller software was written and debugged in the assembler language. An experimental sample of the control system was made and its joint tests with a prototype of a low-power three-phase inverter equipped with a load simulator were carried out, oscillograms of control pulses and output voltage were obtained in various modes of inverter control.
关键词： digital control system,programmable logic device,algorithm,semiconductor power converter,model
更新于2025-09-23 15:23:52
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[IEEE 2018 Conference on Precision Electromagnetic Measurements (CPEM 2018) - Paris (2018.7.8-2018.7.13)] 2018 Conference on Precision Electromagnetic Measurements (CPEM 2018) - Open-Source Package for PJVS Testing and Calibration
摘要： This paper describes a software package for PJVS automated measurements written in Python, an interpreted programming language widely used in scientific applications. The code is modular and expandable with the support of many libraries allowing easy reconfiguration for different calibration and testing purposes.
关键词： Python,measurement software,programmable Josephson array,Voltage standards,open source
更新于2025-09-23 15:23:52
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An FPGA-Oriented Algorithm for Real-Time Filtering of Poisson Noise in Video Streams, with Application to X-Ray Fluoroscopy
摘要： In this paper we propose a new algorithm for real-time ?ltering of video sequences corrupted by Poisson noise. The algorithm provides effective denoising (in some cases overcoming the ?ltering performances of state-of-the-art techniques), is ideally suited for hardware implementation, and can be implemented on a small ?eld-programmable gate array using limited hardware resources. The paper describes the proposed algorithm, using X-ray ?uoroscopy as a case study. We use IIR ?lters for time ?ltering, which largely simpli?es hardware cost with respect to previous FIR ?lter-based implementations. A conditional reset is implemented in the IIR ?lter, to minimize motion blur, with the help of an adaptive thresholding approach. Spatial ?ltering performs a conditional mean to further reduce noise and to remove isolated noisy pixels. IIR ?lter hardware implementation is optimized by using a novel technique, based on Steiglitz–McBride iterative method, to calculate ?xed-point ?lter coef?cients with minimal number of nonzero elements. Implementation results using the smallest StratixIV FPGA show that the system uses only, at most, the 22% of the resources of the device, while performing real-time ?ltering of 1024 × 1024@49fps video stream. For comparison, a previous FIR ?lter-based implementation, on the same FPGA, in the same conditions and constraints (1024 × 1024@49fps), requires the 80% of the logic resources of the FPGA.
关键词： Poisson noise,X-ray video?uoroscopy processing,Field-programmable gate array (FPGA),IIR ?ltering,IIR ?lter design,Real-time video ?ltering
更新于2025-09-23 15:22:29
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HLS Based Approach to Develop an Implementable HDR Algorithm
摘要： Hardware suitability of an algorithm can only be verified when the algorithm is actually implemented in the hardware. By hardware, we indicate system on chip (SoC) where both processor and field-programmable gate array (FPGA) are available. Our goal is to develop a simple algorithm that can be implemented on hardware where high-level synthesis (HLS) will reduce the tiresome work of manual hardware description language (HDL) optimization. We propose an algorithm to achieve high dynamic range (HDR) image from a single low dynamic range (LDR) image. We use highlight removal technique for this purpose. Our target is to develop parameter free simple algorithm that can be easily implemented on hardware. For this purpose, we use statistical information of the image. While software development is verified with state of the art, the HLS approach confirms that the proposed algorithm is implementable to hardware. The performance of the algorithm is measured using four no-reference metrics. According to the measurement of the structural similarity (SSIM) index metric and peak signal-to-noise ratio (PSNR), hardware simulated output is at least 98.87 percent and 39.90 dB similar to the software simulated output. Our approach is novel and effective in the development of hardware implementable HDR algorithm from a single LDR image using the HLS tool.
关键词： system on chip,high-dynamic range image,low-dynamic range image,field-programmable gate array,high-level synthesis
更新于2025-09-23 15:22:29
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[IEEE 2019 IEEE Conference on Power Electronics and Renewable Energy (CPERE) - Aswan City, Egypt (2019.10.23-2019.10.25)] 2019 IEEE Conference on Power Electronics and Renewable Energy (CPERE) - Common-Mode Voltage Analysis of Three-phase Quasi-Z Source Inverters for Transformerless Photovoltaic Systems
摘要： Reducing the capacitance of programmable capacitor arrays (PCAs), commonly used in analog integrated circuits, is necessary for low-energy applications. However, limited mismatch data are available for small capacitors. We report mismatch measurement for a 2-fF poly–insulator–poly (PIP) capacitor, which is the smallest reported PIP capacitor to the best of the authors’ knowledge. Instead of using complicated custom on-chip circuitry, direct mismatch measurement is demonstrated and veri?ed using Monte Carlo simulations and experimental measurements. Capacitive test structures composed of 9-bit PCAs are implemented in a low-cost 0.35-μm CMOS process. Measured data are compared to the mismatch of large PIP capacitors, theoretical models, and recently published data. Measurement results indicate an estimated average relative standard deviation of 0.43% for the 2-fF unit capacitor, which is better than the reported mismatch of metal–oxide–metal (MOM) fringing capacitors implemented in an advanced 32-nm CMOS process.
关键词： programmable capacitor array (PCA),Analog-to-digital converter (ADC),energy-ef?cient circuits,mismatch characterization,capacitance-to-digital converter (CDC),capacitor mismatch
更新于2025-09-23 15:21:01
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Mesh-Structure-Enabled Programmable Multi-Task Photonic Signal Processor on a Silicon Chip
摘要： Photonic integrated circuits (PIC) have recently attracted extensive attention in advanced photonic signal processing to meet the ever-increasing demands on high-speed and ultra-compact data signal management. However, programmable and multi-task photonic signal processing is still full of challenges, especially the scalable photonic integration solution. Here, we design, fabricate and demonstrate a mesh-structure-enabled programmable multi-task photonic signal processor on a silicon chip. It relies on a scalable 2D mesh structure network with a number of hexagonal unit cells formed by building blocks of tunable Mach-Zehnder interferometers (MZIs). We study several simple and complex optical filtering functions using configured single ring resonator, cascaded ring resonators, ring assisted MZI, cascaded MZIs, reconfigurable and tunable comb filter and (de)interleaver, and dual-injection ring resonators. For the proof-of-concept demonstration of on-chip programmable multi-task photonic signal processing, a monolithically integrated silicon chip with four hexagonal unit cells is fabricated with greatly reduced geometric dimension. By appropriately adjusting the thermo-optic phase shifters of MZIs, versatile programmable multi-task photonic signal processing functions are demonstrated in the experiment with impressive performance, including single ring resonator, cascaded ring resonators, asymmetric MZI, ring assisted MZI, optical delay line, multi-port router, N×N optical switch, and optical neural network (ONN) enabled self-configurable router and switch and their practical applications in fiber-optic communication systems. The demonstrations may open up new perspectives for on-chip solutions to ultra-compact, reconfigurable, programmable and multi-functional data signal management in advanced optical communication networks.
关键词： programmable multi-task photonic signal processor,optical neural network,multi-port router,Silicon photonics,photonic integrated circuits,optical switch
更新于2025-09-23 15:21:01
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Light- and humidity-driven actuators with programmable complex shape-deformations
摘要： Programmable complex shape-deformation, multi-responsive property and convenient fabrication are all crucial for the development of actuators. However, a simultaneous realization of all these advantages has not been reported. Here, we report a new type of light- and humidity-driven actuator with programmable complex shape-deformations. The fabrication employs a laser printing technology. The light-driven actuation is based on a dual-mode actuation mechanism which utilizes the water adsorption/desorption properties. When irradiated by near infrared light, the actuator shows a large bending actuation with a curvature up to 2.1 cm-1. More importantly, programmable complex shape-deformations can be realized by printing patterns with different/gradient grayscale distributions on the actuators. The bending rates and amplitudes of actuators can be programmed and controlled. Complex 3D shapes, such as an anomalous tube and a helical cylinder, are obtained. In addition, the actuator can also perform a curvature of 1.3 cm-1 when driven by humidity. Finally, a series of smart biomimetic devices with programmable complex shape-deformations are demonstrated, including a self-adjustment iris responding to incident light, a biomimetic hand demonstrating a complex “OK” gesture, and a lotus with folding petals of different bending rates. This new-type actuator will have great potential in robotics and biomimetic applications.
关键词： programmable,shape-deformation,biomimetic,actuator
更新于2025-09-23 15:21:01