研究目的
Investigating the integration of a field-assisted superlinear threshold selector with resistive random access memory (RRAM) to overcome the sneak current challenge in cross-point RRAM arrays, enabling high-density and high-performance memory applications.
研究成果
The integration of a field-assisted superlinear threshold selector with RRAM successfully addresses the sneak current challenge in cross-point arrays, offering high selectivity, tunable threshold voltage, and excellent endurance. The 1S1R configuration demonstrates significant potential for high-density and high-performance memory applications, with further improvements possible through advanced fabrication techniques and material optimization.
研究不足
The study focuses on the integration of FAST selectors with RRAM for high-density memory applications but does not explore the scalability beyond 4 Mb arrays or the impact of further miniaturization on device performance. Additionally, the exact mechanism behind the FAST selector's switching behavior requires further investigation.
1：Experimental Design and Method Selection:
The study utilizes a field-assisted superlinear threshold (FAST) selector integrated with RRAM to mitigate sneak currents in cross-point arrays. The FAST selector's performance metrics, including selectivity, switching slope, threshold voltage tunability, and endurance, are evaluated.
2：Sample Selection and Data Sources:
The devices were fabricated using a 130-nm CMOS technology without any modification of standard process equipment.
3：List of Experimental Equipment and Materials:
Includes FAST selectors, RRAM cells, and cross-point arrays fabricated with standard CMOS processes.
4：Experimental Procedures and Operational Workflow:
The study involves the fabrication and electrical characterization of FAST selectors and their integration with RRAM in 1S1R configurations. The electrical properties, including I-V characteristics, endurance, and leakage current, are measured.
5：Data Analysis Methods:
The performance of the integrated 1S1R devices is analyzed based on selectivity, memory ON/OFF ratio, and cycling endurance.
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