研究目的
To propose and simulate a graphene/ferroelectric-based integrated plasmonic random access memory (P-RAM) with bistable behavior for information storage and future plasmonic chips development.
研究成果
The proposed graphene/ferroelectric-based P-RAM demonstrates bistable plasmonic behavior with an extinction ratio of 18 dB, suitable for high-performance, low-power memory applications. Its integration-compatible fabrication process and miniaturized footprint make it a promising candidate for future plasmonic circuits, despite its limitations in latching extinction ratio and voltage swing.
研究不足
The relatively low latching extinction ratio (~3.5 dB) and the large voltage swing (7.5 V) required for switching are the main limitations. These can be mitigated by increasing the memory section length and reducing the PZT thickness, respectively, albeit with trade-offs in device speed.
1:Experimental Design and Method Selection:
The study involves numerical simulation of the proposed P-RAM structure using the 3D finite element method (FEM) in COMSOL multiphysics to solve the full Maxwell equations.
2:Sample Selection and Data Sources:
The simulation is based on a theoretical model of a graphene/ferroelectric heterostructure with specific geometrical and physical parameters.
3:List of Experimental Equipment and Materials:
The materials include graphene, lead zirconate titanate (PZT), and germanium (Ge) for the grating. The equipment involves COMSOL multiphysics software for simulation.
4:Experimental Procedures and Operational Workflow:
The simulation involves applying varying voltages to the P-RAM to observe the switching behavior and transmission levels.
5:Data Analysis Methods:
The analysis includes calculating the transmission spectra, plasmonic mode wavelength, and propagation length to evaluate the device performance.
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