研究目的
To demonstrate the monolithic integration of Si-CMOS and III-V compound semiconductors on a common Si substrate to enable new generation of systems with more functionality, better energy efficiency, and smaller form factor.
研究成果
Monolithic integration of Si-CMOS and III-V compound semiconductors on a common Si substrate has been demonstrated successfully. The fragility issue of the GaN LED/HEMT on Si (111) wafer can be addressed by replacing the Si (111) substrate with a fresh Si (001) substrate. This integration enables new circuits and applications with improved performance in terms of speed and power consumption.
研究不足
The fragility issue of the GaN LED/HEMT on Si (111) wafer requires additional wafer bonding steps to replace the substrate, which adds complexity to the process. Some unbonded areas were observed after multiple bonding steps due to particles issue.
1：Experimental Design and Method Selection:
The study utilizes wafer bonding to integrate III-V and Si-CMOS on a common platform.
2：Sample Selection and Data Sources:
Several sets of wafers were prepared including Si (001) wafers, Si-CMOS on SOI substrate, InGaP LED or InGaAs HEMT or GaAs HBT device layers on GaAs/Ge/Si (001) wafers, and GaN LED or HEMT on Si (111) wafers.
3：List of Experimental Equipment and Materials:
Equipment includes metal organic chemical vapour deposition (MOCVD), plasma-enhanced chemical vapour deposition (PECVD), chemical mechanical planarization (CMP), and transmission electron microscopy (TEM). Materials include Si wafers, SOI substrates, and various III-V compound semiconductors.
4：Experimental Procedures and Operational Workflow:
The process involves temporary bonding of Si-CMOS layer on a Si handle wafer, bonding of III-V/Si substrate to the Si-CMOS containing handle wafer, and releasing the handle wafer. Additional steps are required for GaN LED or HEMT on Si substrate.
5：Data Analysis Methods:
Bonding quality was verified using an infrared (IR) camera and TEM was used to examine the bonding interfaces.
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