研究目的
To develop a novel process sequence for simplifying the rear-side patterning of silicon heterojunction interdigitated back contact (HJ IBC) solar cells by enabling in situ switching from hole to electron contacts using partial etching, aiming to achieve efficiencies close to 23% with a simpler and cheaper process.
研究成果
The developed in situ partial dry etch process successfully simplifies the HJ IBC cell fabrication by eliminating ex situ wet cleans and preventing surface re-exposure, achieving efficiencies up to 22.9% comparable to reference methods. It offers a cheaper, faster, and more reliable process, with potential for further optimization to reduce contact resistance and integrate with laser ablation patterning.
研究不足
The process has a narrow window for etch control to avoid passivation loss; spatial non-uniformity in etching rates may affect device performance; contact resistivity is slightly higher in the partial etch route, potentially limiting fill factor; and the method's efficacy on textured surfaces is not evaluated.
1：Experimental Design and Method Selection:
The study employs a novel partial dry etch process using NF3/Ar plasma to selectively remove doped a-Si:H layers without re-exposing the crystalline silicon surface, followed by in situ deposition of opposite polarity layers. Theoretical models include plasma etching mechanisms and passivation quality assessments.
2：Sample Selection and Data Sources:
Mirror-polished p-type Czochralski Si wafers and n-type float zone Si wafers of specific dimensions and resistivities are used. Data on etch rates, passivation quality, and contact resistivity are collected through spectroscopic ellipsometry, photoluminescence imaging, and current-voltage measurements.
3：List of Experimental Equipment and Materials:
Equipment includes PECVD tools for deposition and etching, spectroscopic ellipsometers, Keithley K4200 system for electrical measurements, and shadow masks. Materials include a-Si:H films, SiOx hard masks, NF3 and Ar gases, HF, and various chemicals for cleaning.
4：Experimental Procedures and Operational Workflow:
Wafers are cleaned, passivated with a-Si:H stacks, patterned using photolithography or hard masks, subjected to partial dry etching with controlled gas flows, cleaned in situ with H2 plasma, and repassivated. Solar cells are fabricated, annealed, and characterized using IV measurements under standard conditions.
5：Data Analysis Methods:
Etch rates are determined via linear fits of thickness vs. time. Passivation quality is evaluated using minority carrier lifetime and PL imaging. Contact resistivity is calculated from resistance vs. inverse contact area plots. Cell performance parameters are derived from IV curves.
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