研究目的
To study the impact of low-temperature dark anneal as a pre-treatment on Light and elevated Temperature-Induced Degradation (LeTID) in multicrystalline silicon, aiming to understand the defect mechanism and mitigate degradation.
研究成果
A low-temperature dark anneal can significantly influence LeTID, with short anneals at 200–240 °C increasing degradation and long anneals at 300 °C nearly eliminating it. The correlation with metal precipitation simulations suggests a possible mechanism involving copper, providing insights for mitigating LeTID in solar cells.
研究不足
The study is limited to multicrystalline silicon and specific annealing conditions; results may not generalize to other materials or higher temperatures. The copper model used may overestimate precipitation, and surface degradation effects were not fully separated in some analyses.
1:Experimental Design and Method Selection:
The study involved performing dark anneals at various temperatures (200–300 °C) and durations (0.5–44 h) on multicrystalline silicon samples, followed by LeTID aging under illumination at 0.6 suns and 80 °C. A copper precipitation model was applied to simulate recombination activity.
2:5–44 h) on multicrystalline silicon samples, followed by LeTID aging under illumination at 6 suns and 80 °C. A copper precipitation model was applied to simulate recombination activity.
Sample Selection and Data Sources:
2. Sample Selection and Data Sources: Commercial B-doped high-performance multicrystalline silicon wafers (156 × 156 mm2, resistivity 1.3 Ωcm, thickness 190 μm) from the same ingot height were used. Samples were processed into implied-Voc samples with PERC architecture.
3:3 Ωcm, thickness 190 μm) from the same ingot height were used. Samples were processed into implied-Voc samples with PERC architecture.
List of Experimental Equipment and Materials:
3. List of Experimental Equipment and Materials: Equipment included a quasi-steady-state photoconductance tool (Sinton Instruments WCT-120TS) for lifetime measurements, LED lamp for illumination, and annealing furnaces. Materials included silicon wafers, PECVD SiNx and AlOx/SiNx passivation layers.
4:Experimental Procedures and Operational Workflow:
Wafers were processed, cut into squares, and initial lifetime was mapped. Dark anneals were performed at specified temperatures and times. Samples were then illuminated, and minority carrier lifetimes were measured periodically using QSS-PC. Data analysis involved fitting injection-dependent lifetime to extract bulk and surface components.
5:Data Analysis Methods:
Data were analyzed using Shockley-Read-Hall single defect-level model to extract bulk lifetime. Normalized defect density was calculated to quantify degradation. Simulations of copper precipitation and dissolution were compared with experimental results.
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