研究目的
To develop a full capacitance model for Amorphous Oxide Semiconductor Thin Film Transistors (AOSTFTs) that considers the effect of top-metal overlap contacts in staggered bottom gate structures, including the impact on capacitance behavior due to the drain overlap acting as a second gate.
研究成果
The developed capacitance model accurately reproduces the behavior of AOSTFT capacitances, accounting for top-metal overlap effects and drain voltage influences. It shows good agreement with simulated and experimental data, providing a reliable tool for dynamic circuit simulation in optoelectronics applications.
研究不足
The model requires extraction of fitting parameters from simulations or measurements, which may limit its direct applicability without prior data. The analysis is specific to staggered bottom-gate top-contact AOSTFT structures with passivation layers, and may not generalize to other TFT configurations without modification.
1：Experimental Design and Method Selection:
The study uses device simulation and experimental measurement to validate the capacitance model. Simulations are performed using SILVACO's Athena and ATLAS simulators to model AOSTFT structures with varying top-metal overlap lengths (Ltov). Experimental validation involves measuring fabricated a-IGZO TFTs.
2：Sample Selection and Data Sources:
Simulated devices have W=900 μm, L=30 μm, gate dielectric layer of 200 nm (ki=5.2), semiconductor layer of 12 nm (dielectric constant=9), Mo metal contacts, and passivation layer of 200 nm (ki=5.2). Ltov values of 0, 5, and 10 μm are simulated. A fabricated a-IGZO TFT with Ltov=5 μm, W=1200 μm, L=15 μm is measured.
3：2), semiconductor layer of 12 nm (dielectric constant=9), Mo metal contacts, and passivation layer of 200 nm (ki=2). Ltov values of 0, 5, and 10 μm are simulated. A fabricated a-IGZO TFT with Ltov=5 μm, W=1200 μm, L=15 μm is measured.
List of Experimental Equipment and Materials:
3. List of Experimental Equipment and Materials: Key equipment includes the Keithley 4200 semiconductor characterization system for current-voltage measurements and the Agilent E4980A Precision LCR Meter for capacitance-voltage measurements. Materials involve simulated and fabricated AOSTFT structures with specified dimensions and materials.
4：Experimental Procedures and Operational Workflow:
Current-voltage and capacitance-voltage measurements are conducted on the fabricated device. Simulations generate capacitance vs. VGS and VDS curves for comparison with the model. Model parameters are extracted from transfer and output characteristics using UMEM.
5：Data Analysis Methods:
Capacitance model equations are derived and fitted to simulated and experimental data. Parameters such as VT, γα, αs, m, and fitting parameters (e.g., MM, VA) are optimized for agreement.
独家科研数据包，助您复现前沿成果，加速创新突破
获取完整内容
