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- 摘要
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- 实验方案
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Digital Circuit Methods to Correct and Filter Noise of Nonlinear CMOS Image Sensors
摘要： Nonlinear complementary metal-oxide semiconductor (CMOS) image sensors (CISs), such as logarithmic (log) and linear–logarithmic (linlog) sensors, achieve high/wide dynamic ranges in single exposures at video frame rates. As with linear CISs, fixed pattern noise (FPN) correction and salt-and-pepper noise (SPN) filtering are required to achieve high image quality. This paper presents a method to generate digital integrated circuits, suitable for any monotonic nonlinear CIS, to correct FPN in hard real time. It also presents a method to generate digital integrated circuits, suitable for any monochromatic nonlinear CIS, to filter SPN in hard real time. The methods are validated by implementing and testing generated circuits using field-programmable gate array (FPGA) tools from both Xilinx and Altera. Generated circuits are shown to be efficient, in terms of logic elements, memory bits, and power consumption. Scalability of the methods to full high-definition (FHD) video processing is also demonstrated. In particular, FPN correction and SPN filtering of over 140 megapixels per second are feasible, in hard real time, irrespective of the degree of nonlinearity.
关键词： FPGA,salt-and-pepper noise,digital circuits,real-time processing,fixed pattern noise,CMOS image sensors
更新于2025-09-23 15:22:29
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<i>(Invited)</i> Proximity Gettering Design of Hydrocarbon Molecular Ion Implanted Silicon Wafers Using Direct Bonding Technique for Advanced CMOS Image Sensors: A Review
摘要： We developed high gettering capability silicon wafers for advanced CMOS image sensors using hydrocarbon molecular ion implantation and surface activated direct wafer bonding (SAB). We found that this novel wafer has three unique characteristics for the improvement of CMOS image sensor device performance. The first is metallic impurity gettering capability in the hydrocarbon ion implantation projection range during CMOS device fabrication. The second is the oxygen out-diffusion barrier effect; this wafer can control out-diffusion to the device active region from the CZ grown silicon substrate during CMOS device heat treatment. The third is the hydrogen passivation effect; hydrogen passivates to the Si/SiO2 gate oxide interface state defects which out-diffuse to the device active region from the hydrocarbon ion implantation projection range during the CMOS device fabrication. Moreover, we demonstrated that this novel wafer can improve the pn-junction leakage current under the actual device fabrication.
关键词： CMOS image sensors,hydrocarbon molecular ion implantation,surface activated direct wafer bonding,gettering capability,oxygen out-diffusion barrier,hydrogen passivation
更新于2025-09-23 15:21:21
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Radiation Hardness Comparison of CMOS Image Sensor Technologies at High Total Ionizing Dose Levels
摘要： The impact of the manufacturing process on the radiation induced degradation effects observed in CMOS image sensors at the MGy total ionizing dose levels is investigated. Moreover, the vulnerability of the partially pinned photodiodes at moderate to high total ionizing doses is evaluated for the first time to our knowledge. It is shown that the 3T standard partially pinned photodiode has the lowest dark current before irradiation, but its dark current increases to ~1 pA at 10 kGy(SiO2). Beyond 10 kGy(SiO2), the pixel functionality is lost. The comparison between several CIS technologies points out that the manufacturing process impacts the two main radiation induced degradations: the threshold voltage shift of the readout chain MOSFETs and the dark current increase. For all the tested technologies, 1.8V MOSFETs exhibit the lower threshold voltage shift and the N MOSFETs are the most radiation tolerant. Among all the tested devices, 1.8V sensors achieve the best dark current performance. Several radiation-hard-by-design solutions are evaluated at MGy level to improve further the understanding of CIS radiation hardening at extreme total ionizing dose.
关键词： Gate Overlap,Radiation Effects,Drain,CMOS Image sensors,Partially Pinned Photodiode,Dark Current,TID,Threshold shift,RHBD
更新于2025-09-23 15:21:01
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[IEEE 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC) - Chicago, IL, USA (2019.6.16-2019.6.21)] 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC) - Evaluation of Carrier Trapping in SiN <sub/>x</sub> Towards Ion Migration Measurements
摘要： A low temporal read noise and high conversion gain reset-gate-less CMOS image sensor (CIS) has been developed and demonstrated for the first time at photoelectron-counting-level imaging. To achieve a high pixel conversion gain without fine or special processes, the proposed pixel has two unique structures: 1) coupling capacitance between the transfer gate and floating diffusion (FD) and 2) coupling capacitance between the reset gate and FD, for removing parasitic capacitances around the FD node. As a result, a CIS with the proposed pixels is able to achieve a high pixel conversion gain of 220 μV/e? and a low read noise of 0.27e? rms using correlated multiple-sampling-based readout circuitry.
关键词： low read noise,high conversion gain,photoelectron counting histogram (PCH),CMOS image sensors (CISs),photon counting
更新于2025-09-16 10:30:52
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From EBIC images to qualitative minority carrier diffusion length maps
摘要： A novel method is presented with the aim to perform minority carrier di?usion length map on cross-sectional samples. The method is based on one Electron-Beam Induced Current (EBIC) acquisition and on the analyze of the EBIC signal slope variation on each scanned points. This method is applied on a pinned photodiode array realized on a low doped silicon epitaxy, and the electron di?usion length map which is extracted is in good accordance with our expectation taking into account the doping distribution of the device. A TCAD simulation also con?rms quantitatively the measured di?usion length map. Advantages and drawbacks of this method are discussed in this study.
关键词： CMOS image sensors,CMOS,Scanning electron microscopy (SEM),Simulation,Electron-beam-induced current (EBIC),Deep submicron process,Solid-state image sensor,Semiconductor material measurements
更新于2025-09-10 09:29:36
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Effect of drain current on appearance probability and amplitude of random telegraph noise in low-noise CMOS image sensors
摘要： Random telegraph noise (RTN), which occurs in in-pixel source follower (SF) transistors, has become one of the most critical problems in high-sensitivity CMOS image sensors (CIS) because it is a limiting factor of dark random noise. In this paper, the behaviors of RTN toward changes in SF drain current conditions were analyzed using a low-noise array test circuit measurement system with a ?oor noise of 35 μVrms. In addition to statistical analysis by measuring a large number of transistors (18048 transistors), we also analyzed the behaviors of RTN parameters such as amplitude and time constants in the individual transistors. It is demonstrated that the appearance probability of RTN becomes small under a small drain current condition, although large-amplitude RTN tends to appear in a very small number of cells.
关键词： source follower (SF) transistors,drain current,CMOS image sensors (CIS),Random telegraph noise (RTN),low-noise array test circuit
更新于2025-09-04 15:30:14