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[IEEE 2018 19th International Conference of Young Specialists on Micro/Nanotechnologies and Electron Devices (EDM) - Erlagol (Altai Republic), Russia (2018.6.29-2018.7.3)] 2018 19th International Conference of Young Specialists on Micro/Nanotechnologies and Electron Devices (EDM) - Differential Broadband Transimpedance Amplifier in 130 nm SiGe BiCMOS
摘要： To build modern ultrafast systems on chip, high-frequency transimedance amplifiers are required. In view of the fact that the amplifier is connected at the output of the system, high requirements the level of nonlinear distortions are imposed on. In addition, the amplifier should have a small unevenness in the bandwidth. The article presents a fully differential transimpedance amplifier, which allows to match the system with a load of 50 Ω. The amplifier has a range of operating frequencies of 0.1 ... 3 GHz, gain of 20 dB, with a unevenness not exceeding 2 dB. The described amplifier is built in the 130 nm SiGe BiCMOS process. Operating temperature range -40 ... 85°C. The current consumption is 18 mA.
关键词： SiGe,emitter follower,transimedance amplifier,defferential cascade,matching,BiCMOS
更新于2025-09-10 09:29:36
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A Compact Formulation for Avalanche Multiplication in SiGe HBTs at High Injection Levels
摘要： This paper presents a uni?ed physical formulation for the avalanche effect in silicon-germanium heterojunction bipolar transistors (SiGe HBTs) at different injection levels. Based on an analytical description of the resulting electric-?eld distribution, a closed-form analytical expression for the multiplication factor is derived and has been implemented in the HICUM compact model. The model accuracy close to and beyond the common-emitter breakdown voltage BVCEO has been assessed over a wide temperature range in comparison to measurements of SiGe HBTs with different collector doping pro?les and emitter geometries.
关键词： safe operating area (SOA),high injection,silicon-germanium heterojunction bipolar transistors (SiGe HBTs),compact model,impact ionization,Avalanche,kirk effect
更新于2025-09-10 09:29:36
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Refractive Index Variation of Magnetron-Sputtered a-Si1?xGex by “One-Sample Concept” Combinatory
摘要： Gradient a-Si1?xGex layers have been deposited by "one-sample concept" combinatorial direct current (DC) magnetron sputtering onto one-inch-long Si slabs. Characterizations by electron microscopy, ion beam analysis and ellipsometry show that the layers are amorphous with a uniform thickness, small roughness and compositions from x = 0 to x = 1 changing linearly with the lateral position. By focused-beam mapping ellipsometry, we show that the optical constants also vary linearly with the lateral position, implying that the optical constants are linear functions of the composition. Both the refractive index and the extinction coefficient can be varied in a broad range for a large spectral region. The precise control and the knowledge of layer properties as a function of composition is of primary importance in many applications from solar cells to sensors.
关键词： SiGe,optical properties,spectroscopic ellipsometry
更新于2025-09-10 09:29:36
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[IEEE 2018 IEEE 15th International Conference on Group IV Photonics (GFP) - Cancun (2018.8.29-2018.8.31)] 2018 IEEE 15th International Conference on Group IV Photonics (GFP) - Electronic ICs for Silicon Photonic Transceivers
摘要： We present progress on high-speed electronic ICs for Silicon Photonic transceivers. The design freedom offered by Silicon Photonics is exploited to generate multilevel modulation formats, reduce power consumption and physical footprint or increase speed. We show drivers and receivers integrated in CMOS and SiGe BiCMOS processes.
关键词： CMOS and SiGe BiCMOS integrated circuits
更新于2025-09-10 09:29:36
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Advances in Chemical Mechanical Planarization (CMP) || CMP processing of high mobility?channel materials
摘要： Due to the approaching physical limits for further shrinking and scaling, an alternative way to keep the pace for performance increases of future complementary metal-oxide semiconductor (CMOS) devices is the introduction of high mobility channel materials. The implementation of these alternative materials is targeted for the technology nodes from 10 nm onward. In order to achieve low power and high performance logic devices, the scaling supply voltage (Vdd) has to be optimized. This can be achieved by using materials that have a very high mobility such as Ge (for p-type metal-oxide semiconductors (pMOS)) and IIIeV (for n-type metal-oxide semiconductors (nMOS)) (Skotnicki and Boeuf, 2010). For the fabrication of working devices, gate leakage through the buffer layer needs to be minimized, for example, through doping the buffer layer or by removing the leakage path altogether in a gate-all-around approach. Mobility can be maximized, for example, by deliberate material doping as well as by adjusting the strain and defectivity of the channel layer. The most promising material candidates are Ge for pMOS devices and InGaAs for nMOS devices. The reason for this is the high hole mobility of Ge and the high electron mobility of InGaAs. The hole mobility of a bulk Ge layer is approximately four times and the electron mobility of a bulk InGaAs layer is approximately six times higher when compared to the mobilities of a bulk Si layer. High performance for Ge-based pMOS devices has been demonstrated on a Si platform (Mitard et al., 2009). But in current CMOS devices the Si layer takes advantage of straining methods, which results in higher mobilities; so for the implementation of Ge the application of strain needs also to be considered. However, for InGaAs nMOS devices strain does not improve performance, which could be viewed as an advantage because straining devices becomes harder with more scaling.
关键词： SiGe,CMP,IIIeV,Ge,CMOS,high mobility channel materials
更新于2025-09-10 09:29:36
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Self-organized Ge nanospherical gate/SiO2/Si0.15Ge0.85-nanosheet n-FETs featuring high ON-OFF drain current ratio
摘要： We reported experimental fabrication and characterization of Si0.15Ge0.85 n-MOSFETs comprising a gate-stacking of Ge-nanospherical gate/SiO2/Si0.15Ge0.85-nanosheet on SOI (100) substrate in a self-organization approach. This unique gate-stacking heterostructure is simultaneously produced in a single oxidation step as a consequence of an exquisitely-controlled dynamic balance between the concentrations of oxygen, Si, and Ge interstitials at 900oC. Process-controlled tunability of nanospherical gate of 60?100nm in diameter, gate oxide thickness of 3nm, and Si0.15Ge0.85 nanosheet with compressive strain of -2.5% was achieved. Superior gate modulation is evidenced by subthreshold slope of 150mV/dec and ION/IOFF > 5×108 (IOFF < 10-6 μA/μm and ION > 500 μA/μm) measured at VG = +1V, VD = +1V, and T = 80K for our device with channel length of 75nm.
关键词： self organization,Ge-gate,SiGe nanosheet,junctionless FET
更新于2025-09-10 09:29:36
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A 128-Pixel System-on-a-Chip for Real-Time Super-Resolution Terahertz Near-Field Imaging
摘要： This paper presents a fully integrated system-on-a-chip for real-time terahertz super-resolution near-field imaging. The chip consists of 128 sensing pixels with individual cross-bridged double 3-D split-ring resonators arranged in a 3.2 mm long 2 × 64 1-D array. It is implemented in 0.13-μm SiGe bipolar complementary metal–oxide–semiconductor technology and operated at around 550 GHz. All the functions, including sensor illumination, near-field sensing, and detection, are co-integrated with a readout integrated circuit for real-time image acquisition. The pixels exhibit a permittivity-based imaging contrast with a worst case estimated relative permittivity uncertainty of 0.33 and 10–12-μm spatial resolution. The sensor illumination is provided with on-chip oscillators feeding four-way equal power divider networks to enable an effective pixel pitch of 25 μm and a dense fill factor of 48% for the 1-D sensing area. The oscillators are equipped with electronic chopping to avoid 1/f-noise-related desensitization for the SiGe-heterojunction bipolar transistor power detectors integrated at each pixel. The chip features both an analog readout mode and a lock-in-amplifier-based digital readout mode. In the analog readout mode, the measured dynamic range (DR) is 63.8 dB for a 1-ms integration time at an external lock-in amplifier. The digital readout mode achieves a DR of 38.5 dB at 28 f/s. The chip consumes 37–104 mW of power and is packaged into a compact imaging module. This paper further demonstrates real-time acquisition of 2-D terahertz super-resolution images of a nickel mesh with 50-μm feature size, as well as a biometric human fingerprint.
关键词： terahertz,system-on-a-chip (SoC),SiGe heterojunction bipolar transistor (HBT),split-ring resonator (SRR),near-field array,3-push Colpitts oscillator,super-resolution imaging,near-field scanning optical microscopy (NSOM),power detector
更新于2025-09-09 09:28:46
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[IEEE 2018 20th International Conference on Transparent Optical Networks (ICTON) - Bucharest (2018.7.1-2018.7.5)] 2018 20th International Conference on Transparent Optical Networks (ICTON) - Ge-Rich Graded-Index SiGe Alloys: Exploring a Versatile Platform for mid-IR Photonics
摘要： In this paper, the recent progress on a new Ge-rich SiGe platform for mid-IR integrated photonics is presented. Low-loss spiral waveguides working over a broadband wavelength range are discussed, followed by a sensing proof-of-concept using a standalone photoresist with a known spectral absorption pattern. In addition, the development of new mid-IR interferometric devices for wavelength filtering and enhancement of the light-matter interaction are presented. Finally, efficient designs to exploit the third-order nonlinearities in these Ge-rich SiGe waveguides at mid-IR wavelengths are shown. The demonstration of these key building blocks will pave the way towards the implementation of new mid-IR photonic integrated systems with multiple functionalities.
关键词： waveguides,non-linear mid-IR photonics,interferometric optical devices,mid-IR integrated photonics,SiGe alloys,mid-IR spectroscopy
更新于2025-09-09 09:28:46
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Dynamic SIMS, spectroscopic ellipsometry and x-ray diffractometry analysis of SiGe HBTs with Ge grading
摘要： In this paper, SiGe heterojunction bipolar transistors (HBTs) with Ge concentrations up to 40 atomic percent (at%) and different slopes of Ge gradients are characterized by comparing dynamic secondary ion mass spectrometry (D-SIMS) and multi-angle spectroscopic ellipsometry (SE). X-ray diffractometry (XRD) was used as reference. D-SIMS results show that sputter rate and Ge content calibration have major impact on depth pro?le measurements of HBTs with graded SiGe. Strained and relaxed SiGe show differences in Ge content calibration and no difference in sputter rate calibration. Jiang’s protocol was used for Ge content calibration and proven to be valid up to ～50 at% Ge. SE with a combination of 3 angles of incidence (AOIs) (59, 65, 71°) in comparison with the single AOI (71°) realized in industrial setup for semiconductor manufacturing environment was analyzed to ?nd a more stable solution for revealing the thickness of plateau and gradient parts of SiGe base. SE with 71° AOI and rotating compensator is the best choice for in-line HBT with Ge grading characterization. The determination of gradient shape continues to be a challenging task for SE, due to high parameter correlations and the need to use some ?xed parameters within the ?tting procedure. D-SIMS remains the favorite for graded pro?le determination. Results of D-SIMS and SE with ?xed parameters are in good agreement with XRD for HBTs with Ge grading.
关键词： SiGe,XRD,spectroscopic ellipsometry,SIMS,HBT
更新于2025-09-09 09:28:46
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[IEEE 2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC) - Shenzhen (2018.6.6-2018.6.8)] 2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC) - The Design of High Performance Si/SiGe-Based Tunneling FET: Strategies and Solutions
摘要： The strategy and solutions in the design of tunneling FET for low voltage/power applications will be addressed in this paper. First, the concept of a face-tunneling scheme to provide a sufficient improvement over the conventional point tunneling has been justified by an experiment. By taking advantage of an area-tunneling, in comparison to conventional point-tunneling FET, face-tunneling FET (f-TFET) can be enhanced in its Ion current. This work shows Ion of f-TFET with one-order magnitude that of point-TFET(control), and the longer the gate length is, the higher the Ion becomes. However, from experimental results, S.S. of f-TFET is a little worse than that of control. This can be better improved by careful treatment of a special design epi-channel, Next, the TFET performance has been proposed by a further design of an improved epitaxial SiGe-based channel structure. The design is based on a raised-drain structure with further improvement on the Ion current and much lower S. S. down to 28mV/dec.
关键词： tunneling FET,raised-drain structure,face-tunneling,point-tunneling,SiGe-based channel,sub-threshold swing,Ion current
更新于2025-09-09 09:28:46