- 标题
- 摘要
- 关键词
- 实验方案
- 产品
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Improved stability of silver nanowire (AgNW) electrode for high temperature applications using selective photoresist passivation
摘要： Metal nanostructure arrays have been progressed as an alternative to the conventional oxides-based transparent conductive electrodes. Herein, we demonstrate the improved reliability of silver nanowire (AgNW) electrodes by photoresist encapsulation. The incorporation of photoresist followed by photolithography is beneficial to selectively pattern the AgNWs on poly[ether sulfone]. By varying the development or removal time of the ultraviolet (UV)-exposed photoresist, the properties of the AgNWs in the electrode are significantly varied. The optical parameters such as transmittance, haziness, and the yellow index of the electrodes have been extensively studied to reveal the advantage of the selective photoresist patterning. The AgNW electrodes patterned under 120 s of development time explored superior optical and electrical properties with high durability. The electrical properties of the AgNW electrodes at high temperatures (250 °C) demonstrate the photoresist-induced stability as compared to bare samples. Further, the morphological examination after the high temperature treatment reveals the reduced Rayleigh instability effects in 120s developed AgNWs that facilitate the reliability under harsh conditions.
关键词： photoresist selective passivation,development time,high reliability,Silver nanowire (AgNW) electrode
更新于2025-09-23 15:23:52
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[IEEE 2019 IEEE MTT-S International Microwave Workshop Series on Advanced Materials and Processes for RF and THz Applications (IMWS-AMP) - Bochum, Germany (2019.7.16-2019.7.18)] 2019 IEEE MTT-S International Microwave Workshop Series on Advanced Materials and Processes for RF and THz Applications (IMWS-AMP) - New approach for the simulation of bent and crumpled antennas on a flexible substrate
摘要： First-ever 28 nm embedded split-gate MONOS (SG-MONOS) ?ash macros have been developed to increase memory capacity embedded in micro controller units and to improve performance over wide junction temperature range from C to 170 C as demanded strongly in automotive uses. Much attention has been paid to the degradation of the reliability characteristics along with the process shrinkage. Temperature-adjusted word-line overdrive scheme improves random read access frequency by 15% and realizes both of 6.4 GB/s read throughput by 200 MHz no-wait random access of code ?ash macros and more than ten times longer TDDB lifetime of WL drivers. Temperature-adaptive step pulse erase control (TASPEC) improves the TDDB lifetime of dielectric ?lms between metal interconnect layers by three times. TASPEC is particularly useful for a data ?ash macro with one million rewrite cycles. Source-side injection (SSI) program with negative back-bias voltage achieves 63% reduction of program pulse time and, consequently, realizes 2.0 MB/s write throughput of code ?ash macros. A spread spectrum clock generation and a clock phase shift technique are introduced for charge pump clock generation in order to suppress EMI noise due to high write throughput of code ?ash macros, and peak power of EMI noise is reduced by 19 dB.
关键词： high reliability,spread spectrum clock generation,word-line overdrive,Automotive application,split-gate MONOS(SG-MONOS),embedded ?ash memory,time dependent dielectric breakdown,high-temperature operation,Fast random read operation
更新于2025-09-23 15:19:57
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[IEEE 2019 IEEE 8th International Conference on Advanced Optoelectronics and Lasers (CAOL) - Sozopol, Bulgaria (2019.9.6-2019.9.8)] 2019 IEEE 8th International Conference on Advanced Optoelectronics and Lasers (CAOL) - Computed tomography dataset analysis for stereotaxic neurosurgery navigation
摘要： First-ever 28 nm embedded split-gate MONOS (SG-MONOS) ?ash macros have been developed to increase memory capacity embedded in micro controller units and to improve performance over wide junction temperature range from C to 170 C as demanded strongly in automotive uses. Much attention has been paid to the degradation of the reliability characteristics along with the process shrinkage. Temperature-adjusted word-line overdrive scheme improves random read access frequency by 15% and realizes both of 6.4 GB/s read throughput by 200 MHz no-wait random access of code ?ash macros and more than ten times longer TDDB lifetime of WL drivers. Temperature-adaptive step pulse erase control (TASPEC) improves the TDDB lifetime of dielectric ?lms between metal interconnect layers by three times. TASPEC is particularly useful for a data ?ash macro with one million rewrite cycles. Source-side injection (SSI) program with negative back-bias voltage achieves 63% reduction of program pulse time and, consequently, realizes 2.0 MB/s write throughput of code ?ash macros. A spread spectrum clock generation and a clock phase shift technique are introduced for charge pump clock generation in order to suppress EMI noise due to high write throughput of code ?ash macros, and peak power of EMI noise is reduced by 19 dB.
关键词： high-temperature operation,time dependent dielectric breakdown,Automotive application,high reliability,spread spectrum clock generation,word-line over-drive,split-gate MONOS(SG-MONOS),embedded ?ash memory,Fast random read operation
更新于2025-09-19 17:13:59
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Multioutputs single-stage gate driver on array with wide temperature operable thin-film-transistor liquid-crystal display for high resolution application
摘要： A hydrogenated amorphous silicon (a‐Si:H) thin‐film transistor (TFT) gate driver with multioutputs (eight outputs per stage) for high reliability, 10.7‐inch automotive display has been proposed. The driver circuit is composed of one SR controller, eight driving TFTs (one stage to eight outputs) with bridging TFTs. The SR controller, which starts up the driving TFTs, could also prevent the noise of gate line for nonworking period. The bridging TFT, using width decreasing which connects between the SR controller and the driving TFT, could produce the floating state which is beneficial to couple the gate voltage, improves the driving ability of output, and reaches consistent rising time in high temperature and low temperature environment. Moreover, 8‐phase clocks with 75% overlapping and dual‐side driving scheme are also used in the circuit design to ensure enough charging time and reduce the loading of each gate line. According to lifetime test results, the proposed gate driver of 720 stages pass the extreme temperature range test (90°C and ?40°C) for simulation, and operates stably over 800 hours at 90°C for measurement. Besides, this design is successfully demonstrated in a 10.7‐inch full HD (1080 × RGB×1920) TFT‐liquid‐crystal display (LCD) panel.
关键词： thin film transistor (TFT),wide temperature,high reliability,gate driver,amorphous silicon (a‐Si)
更新于2025-09-09 09:28:46