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- 摘要
- 关键词
- 实验方案
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[IEEE 2019 Compound Semiconductor Week (CSW) - Nara, Japan (2019.5.19-2019.5.23)] 2019 Compound Semiconductor Week (CSW) - Room-Temperature Electrically Pumped InP-based $1.3\boldsymbol{\mu} \mathbf{m}$ Quantum Dot Laser on on-axis (001) Silicon
摘要： We present a method for quantifying a risk for killer defects at layer level and estimating yield for substrate packages using information from design ?les. To calculate risk ranks and predicted yield, we de?ne a risk distance that is a key parameter extracted from designs using image processing techniques. In order to validate our model, we analyze two different designs, each having multiple layers, and compare with data from baseline lots. It is shown that there is an inverse correlation between risk layer ranks and yield. Estimated yield based on our model is compared with baseline yield for four layers of the second design. The model-to-baseline yield difference is less than 1% for three layers we tested.
关键词： yield estimation,assembly,circuit analysis,metrology sampling,Yield prediction,integrated circuit packaging
更新于2025-09-23 15:19:57
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[IEEE 2019 Compound Semiconductor Week (CSW) - Nara, Japan (2019.5.19-2019.5.23)] 2019 Compound Semiconductor Week (CSW) - Effect of Annealing on The Bottom Cell in GaInP/GaAs/GaInNAsSb Triple Junction Solar Cells by MBE/MOCVD Hybrid Growth
摘要： We present a method for quantifying a risk for killer defects at layer level and estimating yield for substrate packages using information from design ?les. To calculate risk ranks and predicted yield, we de?ne a risk distance that is a key parameter extracted from designs using image processing techniques. In order to validate our model, we analyze two different designs, each having multiple layers, and compare with data from baseline lots. It is shown that there is an inverse correlation between risk layer ranks and yield. Estimated yield based on our model is compared with baseline yield for four layers of the second design. The model-to-baseline yield difference is less than 1% for three layers we tested.
关键词： yield estimation,assembly,circuit analysis,metrology sampling,Yield prediction,integrated circuit packaging
更新于2025-09-23 15:19:57
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[IEEE 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC) - Chicago, IL, USA (2019.6.16-2019.6.21)] 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC) - The Luminescent Down Shifting Effect of Single-Junction GaAs Solar Cell with Perovskite Quantum Dots
摘要： We present a method for quantifying a risk for killer defects at layer level and estimating yield for substrate packages using information from design ?les. To calculate risk ranks and predicted yield, we de?ne a risk distance that is a key parameter extracted from designs using image processing techniques. In order to validate our model, we analyze two different designs, each having multiple layers, and compare with data from baseline lots. It is shown that there is an inverse correlation between risk layer ranks and yield. Estimated yield based on our model is compared with baseline yield for four layers of the second design. The model-to-baseline yield difference is less than 1% for three layers we tested.
关键词： metrology sampling,circuit analysis,assembly,yield estimation,integrated circuit packaging,Yield prediction
更新于2025-09-19 17:13:59