研究目的
The objective of the present paper is to provide a novel method for reducing the width of structures generated by ink deposition on pre-patterned substrates. We aim to achieve resolutions which are not only much smaller than the resolution of the applied additive process, but also smaller than the width of the pre-patterned structures.
研究成果
The study demonstrates a low-cost method for fabricating sub-200 nm metal wires using spincoating and sintering on pre-patterned substrates, achieving good electrical conductivity. Flash lamp annealing helps limit grain growth and reduce sintering time. This approach is promising for applications in flexible electronics and optical devices, with potential for further optimization using monodisperse nanoparticles.
研究不足
The method is limited by grain growth during sintering, which increases line edge roughness and can cause wire breaks, especially for very thin wires. The use of polydisperse nanoparticle inks restricts minimum achievable line widths. Thermal reflow may affect substrate flatness, and the process may not be suitable for all polymer substrates due to temperature constraints.
1：Experimental Design and Method Selection:
The study uses a combination of spincoating on prepatterned polymer substrates with V-grooves and flash lamp annealing (FLA) or thermal sintering to fabricate sub-200 nm metal wires from silver nanoparticle inks. The method leverages self-confinement in V-grooves, solvent evaporation, and sintering to reduce line widths.
2：Sample Selection and Data Sources:
Substrates are silicon wafers with V-grooves created by anisotropic etching, replicated into PMMA layers via UV-assisted nanoimprint lithography. Commercial silver ink (Smart’Ink S-CS31506 from Genes’Ink) is used, diluted with isopropyl alcohol (IPA).
3：List of Experimental Equipment and Materials:
Equipment includes a SüSS MA6 mask aligner for photolithography, reactive ion etching (RIE) system, spin coater, hotplate for thermal sintering, PulseForge 1300 flash lamp annealing system, Zeiss Supra VP55 SEM for imaging, and Balzers BAE-250 thermal evaporator for contact pad deposition. Materials include silicon wafers, Si3N4, AZ nLOF 2020 negative resist, KOH etchant, PMMA, silver ink, IPA, and silver for contact pads.
4：Experimental Procedures and Operational Workflow:
Steps involve: fabricating silicon stamps with V-grooves via photolithography and etching; replicating into PMMA via nanoimprint; spincoating diluted silver ink on PMMA substrates; sintering via thermal treatment at 150°C or FLA; characterizing with SEM and electrical measurements.
5：Data Analysis Methods:
Line width and roughness are measured using SEM images and box plot statistical methods. Electrical resistivity is calculated based on resistance measurements, considering cross-sectional area and wire geometry.
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