研究目的
To reduce SiNWFET intrinsic device noise by replacing oxide/semiconductor interfaces with metal/semiconductor Schottky junctions.
研究成果
The SiNW-SJGFETs demonstrated significantly reduced low-frequency noise compared to traditional MOSFETs, with a near ideal subthreshold slope and high on/off current ratio. This noise reduction, combined with potential further improvements through structural optimizations like gate-all-around designs, makes SJGFETs promising for high signal-to-noise ratio sensor applications in ion sensing and beyond.
研究不足
The operation range of SJGFETs is limited by gate leakage current, which can cause drift in readout current. The bias conditions need careful adjustment to avoid forward biasing the Schottky junction. Noise dispersion in nanoscale devices may affect performance consistency.
1：Experimental Design and Method Selection:
The study designed and fabricated Schottky junction gated silicon nanowire field-effect transistors (SiNW-SJGFETs) using standard silicon CMOS technology, with control groups of depletion-mode and inversion-mode SiNWFETs. Theoretical models for threshold voltage and gate leakage current were employed.
2：Sample Selection and Data Sources:
Devices were fabricated on silicon-on-insulator (SOI) wafers with specific doping concentrations and dimensions. Electrical and noise measurements were conducted on these fabricated devices.
3：List of Experimental Equipment and Materials:
Equipment includes a Keysight B1500A precision semiconductor parameter analyzer for electrical characterization, a Keysight E4727A advanced low-frequency noise analyzer for noise measurements, electron beam lithography (EBL) for patterning, reactive ion etching, rapid thermal processing (RTP) for silicide formation, and atomic layer deposition (ALD) for oxide growth. Materials include SOI wafers, platinum (Pt), hafnium dioxide (HfO2), and polydimethylsiloxane (PDMS) for containers.
4：Experimental Procedures and Operational Workflow:
Fabrication involved thinning the silicon layer, ion implantation for doping, EBL and etching for device patterning, Pt evaporation and lift-off, RTP for PtSi formation, and metallization. Electrical measurements included transfer and output characteristics, low-frequency noise analysis, and ion sensing using extended gate electrodes with pH and Na+ solutions.
5：Data Analysis Methods:
Noise data were analyzed using power spectral density (PSD) measurements, with calculations for normalized noise and transconductance. Simulations using Silvaco were performed for electron density and current distribution analysis.
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Precision Semiconductor Parameter Analyzer
B1500A
Keysight
Used for measuring transfer and output characteristics of the devices.
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Advanced Low-Frequency Noise Analyzer
E4727A
Keysight
Used for characterizing the power spectral density of drain-to-source current.
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Electron Beam Lithography System
Used for defining the device structures such as SiNW and source/drain terminals.
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Reactive Ion Etching System
Used for etching the defined patterns into the silicon layer.
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Rapid Thermal Processing System
Used for forming platinum silicide by annealing.
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Atomic Layer Deposition System
Used for growing gate oxide layers such as HfO2.
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Scanning Electron Microscope
Used for imaging the device structures, e.g., top-view and cross-sectional views.
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Transmission Electron Microscope
Used for cross-sectional imaging and elemental analysis via EDX.
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Energy Dispersive X-ray Spectroscopy System
EDX
Used for elemental profiling to confirm material compositions.
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Reference Electrode
AgCl/Ag
Used in ion sensing experiments to set the reference potential in electrolytes.
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Polydimethylsiloxane Container
PDMS
Used to hold the solution during ion sensing measurements.
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