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Highly sensitive and selective room-temperature NO2 gas-sensing characteristics of SnOX-based p-type thin-film transistor
摘要： The high-performance p-type metal-oxide-semiconductor (MOS)-based gas sensor is an important subject of research in the field of gas-sensing technology. In this work, we demonstrated a p-type MOS-based thin-film transistor (TFT) nitrogen dioxide (NO2) gas sensor that used tin oxide (SnOX) for both the channel and sensing layers. The crystalline status, surface morphology, and atomic-bonding configuration of the thin-film were examined using X-ray diffraction, field emission-scanning electron microscopy, and X-ray photoelectron spectroscopy. The results indicated that the deposited thin-film was mainly composed of polycrystalline SnO with a tetragonal structure. The fabricated p-type SnOX TFT showed a maximum response value of 19.4-10 ppm NO2 at room temperature (RT, 25 °C) when operated in the subthreshold region, which was significantly higher than that of 2.8–10 ppm NO2 obtained from a p-type SnOX thin-film chemiresistor at RT. In addition, the SnOX TFT gas sensor showed significantly higher sensitivity to NO2 gas than to other target gases such as NH3, H2S, CO2, and CO at RT. To the best of our knowledge, this is the first study to a p-type MOS-based field-effect transistor-type gas sensor. Our experimental results demonstrate that the p-type SnOX TFT is a promising gas sensor that can operate at RT with high sensitivity and selectivity to NO2 gas.
关键词： SnO,Thin-film transistor,NO2 gas sensing,SnOX,P-type metal oxide semiconductor
更新于2025-11-21 11:01:37
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Determination of physical mechanism responsible for the capacitance-voltage weak inversion “hump” phenomenon in n-InGaAs based metal-oxide-semiconductor gate stacks
摘要： Weak inversion capacitance-voltage (C-V) “hump” is a widely observed phenomenon at n-InGaAs based metal oxide semiconductor (MOS) structures. The mechanism responsible for this phenomenon is still under discussion. The C-V hump can be explained as an interaction of interface states with either one or both semiconductor energy bands. Each of the proposed mechanisms leads to a different interpretation of C-V hump. Simulating the mechanisms by relevant equivalent circuits, the capacitance and conductance characteristics of the MOS structure were calculated and compared with experimental results. The mechanism responsible for the C-V hump was determined.
关键词： interface states,equivalent circuits,n-InGaAs,metal-oxide-semiconductor,capacitance-voltage hump
更新于2025-11-14 17:28:48
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A comprehensive study on the interface states in the ECR-PECVD SiO2/p-Si MOS structures analyzed by different method
摘要： The electrical properties of SiO2/p-Si films deposited by ECR-PECVD were studied at different frequencies (100-1 MHz) and gate voltages (-6–3 V). Results showed a frequency dispersion of C-Vg and G/ω-Vg. With increasing frequency, the capacitance and conductance are strongly decreased. An apparent peak in the depletion regime of the G/ω-Vg plots can be attributed to the existence of density Nss at Si/SiO2. The (Nss)value vary from 1.5 × 10^12 to 0.5 × 10^11 eV^-1 cm^-2, it has been determined by High-Low frequency capacitance technic. The Nss- Vg curve presents a peak at about -3 V, suggesting the presence Nss between the (Si)/SiO2 interface. Hill and Coleman method shows that the Nss decreases with increasing frequency which explains the high value of capacitance at low frequency. The Nss and their relaxation time τ by the conductance method ranged from 1.8 × 10^13 to 1.37 × 10^11 eV^-1 cm^-2 and 5.17 × 10^-7 to 8 × 10^-6 s, in the range (0.189-Ev) and (0.57- Ev) eV, respectively. The Nss was responsible for the non-ideal behavior of C-Vg and G-Vg leading to the breakdown of such device. Comparing the three method results show that parallel conductance is very precise and accurate.
关键词： Capacitance method,Relaxation time,Frequency,Interface states,Metal/Oxide/Semiconductor (MOS),Conductance method
更新于2025-09-23 15:23:52
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[IEEE 2018 IEEE CPMT Symposium Japan (ICSJ) - Kyoto, Japan (2018.11.19-2018.11.21)] 2018 IEEE CPMT Symposium Japan (ICSJ) - Study on corundum-structured p-type iridium oxide thin films and band alignment at iridium oxide /gallium oxide hetero-junction
摘要： Corundum-structured iridium oxide, showing p-type conductivity, is a powerful candidate material for forming high-quality pn hetero-junctions with gallium oxide. We have succeeded in fabricating corundum-structured iridium oxide thin films on sapphire substrates. According to the optical transmittance measurement, the optical bandgap of iridium oxide was found to be approximately 3.0 eV. Furthermore, the band alignment at the iridium oxide /gallium oxide interface was investigated by X-ray photoemission spectroscopy, revealing a staggered-gap (type-Ⅱ) with the valence and conduction band offsets of 3.3 eV and 1.0 eV, respectively.
关键词： p-type oxide semiconductor,band alignment,gallium oxide
更新于2025-09-23 15:22:29
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Backside-illuminated CMOS Photodiodes with Embedded Polysilicon Grating Reflectors
摘要： In this study, we investigated the feasibility of replacing metal mirrors with polysilicon gratings to serve as compact optical back reflectors in thin backside-illuminated CMOS photodiodes (BSI CPDs). The unique reflective properties of polysilicon grating reflectors can be implemented within a very small area (12 μm2); i.e., between the contact vias of BSI CPDs. The proposed scheme achieves high optical reflectivity for TE-polarized light at wavelengths exceeding 100 nm, while improving responsivity at near-infrared wavelengths. The resulting BSI CPDs were shown to enhance photocurrent by 1.45x in a polarization-dependent manner (ITE/ITM =1.148) at a wavelength of 980 nm.
关键词： complementary metal oxide semiconductor (CMOS),backside-illuminated photodiode,polysilicon grating reflector
更新于2025-09-23 15:22:29
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Complementary Integrated Circuits Based on n-Type and p-Type Oxide Semiconductors for Applications Beyond Flat-Panel Displays
摘要： Oxide semiconductors are highly attractive for fabrication of large-area thin-film electronics because of their high electrical performance, low process temperature, high uniformity, and ease of industrial manufacturing. n-type oxide semiconductors, such as InGaZnO, are highly developed and have already been commercialized for backplane drivers of flat-panel displays. To date, developing CMOS technology is still an urgent issue in order to build low-power electronic circuits based on oxide semiconductors. In this paper, various CMOS circuits, including inverters, NAND, NOR, XOR, d-latches, full adders, and 7-, 11-, 21-, and 51-stage ring oscillators (ROs), are fabricated based on sputtered p-type tin monoxide and n-type InGaZnO. The inverters show rail-to-rail output voltage behavior, low average static power consumption of 8.84 nW, high noise margin level up to ~40% supply voltage, high yield of 98%, and high uniformity with negligible standard deviation. The NAND, NOR, XOR, d-latches, and full adders show desirably ideal input–output characteristics. The performances of ROs indicate small stage delay of ~1 μs, extremely high uniformity and high yield which are essential for large-area thin-film electronics. This paper may inspire constructions of low power, large area, large scale, and high-performance transparent/flexible CMOS circuits fully based on oxide semiconductors for applications beyond flat-panel displays.
关键词： CMOS,oxide semiconductor,thin-film transistor (TFT),IC
更新于2025-09-23 15:22:29
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Volatile Memory Characteristics of a Solution-Processed Tin Oxide Semiconductor
摘要： In this paper, we demonstrate and study volatile memory characteristics of the sol-gel SnOx semiconductor. The SnOx exhibits a significant self-rectifying behavior and high nonlinearity. Low reverse-biased currents and high forward-biased currents are observed in the positive and negative voltage regions, respectively. The rectifying ratio can reach 3.7 × 10^5, and the selection ratio (I@Vread/I@0.5Vread) is 10^2. A pinched current hysteresis is found in the forward-biased region, which indicates the volatile memory characteristics of the SnOx memory. The resistance ratio between the high-resistance state (HRS) and low-resistance state (LRS) is ~10^5. In addition, the stability test reveals that the memory can repeatedly operate for over 1.5 × 10^3 cycles.
关键词： Hysteresis,Solution process,Oxide semiconductor,Thin film,Electrical characteristics
更新于2025-09-23 15:22:29
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[Communications in Computer and Information Science] Advances in Computing and Data Sciences Volume 905 (Second International Conference, ICACDS 2018, Dehradun, India, April 20-21, 2018, Revised Selected Papers, Part I) || Assessing the Performance of CMOS Amplifiers Using High-k Dielectric with Metal Gate on High Mobility Substrate
摘要： With the increase in demand for high-performance ICs for both memory and logic applications, scaling has been continued down to 14 nm node. To meet the performance requirements, high-k dielectrics such as HfO2, ZrO2 have replaced SiO2 in the conventional MOS structure for sub-45 nm node. Correspondingly, the polysilicon gate electrode has been replaced by metal gate electrode in order to enable integration with high-k. Furthermore, the standard silicon substrate has been replaced by high mobility substrate in order to obtain desired transistor performance. While the fabrication technology for CMOS has advanced rapidly the traditional design tools used for designing circuits continues to use conventional MOS structure and their properties. This paper aims to analyze frequency response of CMOS common source ampli?er(CSA) and di?erential ampli?er by simulating in MATLAB using metal gate/high-k/Ge structure and to compare with traditionally used ampli?er design using standard MOS structure.
关键词： CMOS - Complementary Metal Oxide Semiconductor,EOT - E?ective Oxide Thickness,CSA - Common Source Ampli?er,UGB - Unity Gain Bandwidth,High-k dielectrics based ampli?er design
更新于2025-09-23 15:21:01
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Si-doping effect on solution-processed In-O thin-film transistors
摘要： In this work, silicon-doped indium oxide thin-film transistors (TFTs) have been fabricated for the first time by a solution processing method. By varying the Si concentration in the In2O3-SiO2 binary oxide structure up to 15 at.%, the thicknesses, densities, and crystallinity of the resulting In-Si-O (ISO) thin films were investigated by X-ray reflectivity (XRR) and X-ray diffraction techniques, while the produced TFTs were characterized by a conventional three-probe method. The results of XRR analysis revealed that the increase in the content of Si dopant increased the thickness of the produced film and reduced its density, and that all the Si-doped ISO thin films contained only a single amorphous phase even after annealing at temperatures as high as 800 °C. The manufactured ISO TFTs exhibited a reduction in the absolute value of threshold voltage VT close to 0 V and low current in the off-state, as compared to those of the non-doped indium oxide films, due to the reduced number of oxygen defects, which was consistent with the behavior of ISO TFTs fabricated by a sputtering method. The ISO TFT with a Si content of 3 at.% annealed at 400 °C demonstrated the smallest subthreshold swing of 0.5 V/dec, VT of ?5 V, mobility of 0.21 cm2/Vs, and on/off current ratio of about 2×107.
关键词： silicon-doped indium oxide,solution processing,amorphous oxide semiconductor,thin-film transistor,spin coating
更新于2025-09-23 15:21:01
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92.5% Average Power Efficiency Fully Integrated Floating Buck Quasi-Resonant LED Drivers Using GaN FETs
摘要： LEDs are highly energy ef?cient and have substantially longer lifetimes compared to other existing lighting technologies. In order to facilitate the new generation of LED devices, approaches to improve power ef?ciency with increased integration level for lighting device should be analysed. This paper proposes a fully on-chip integrated LED driver design implemented using heterogeneous integration of gallium nitride (GaN) devices atop BCD circuits. The performance of the proposed design is then compared with the conventional fully on-board integration of power devices with the LED driver integrated circuit (IC). The experimental results con?rm that the fully on-chip integrated LED driver achieves a consistently higher power ef?ciency value compared with the fully on-board design within the input voltage range of 4.5–5.5 V. The maximal percentage improvement in the ef?ciency of the on-chip solution compared with the on-board solution is 18%.
关键词： fully on-chip,gallium nitride (GaN),?oating buck converter,complementary-metal-oxide-semiconductor (CMOS),quasi resonance,integrated LED driver,heterogeneous integration
更新于2025-09-23 15:21:01