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A reliable and efficient small-signal parameter extraction method for GaN HEMTs
摘要： In this paper, a reliable and efficient parameter extraction method for GaN high electron mobility transistor (HEMT) small‐signal models has been proposed. By utilizing parameter scanning method, the initial values of the extrinsic elements are first extracted from the cold pinch‐off and cold unbiased measurement conditions, respectively. An iterative optimization algorithm is employed then to optimize the extrinsic elements. This scanning and iteration combined algorithm based on a direct extraction method of extrinsic elements can reduce the impact of the approximation error, which makes the determined values of the small‐signal parameters more reliable. The extraction flow has been realized in a Matlab program for efficiency. A 16‐element small‐signal equivalent circuit model (SSECM) for GaN HEMTs has been employed, and the new parameter extraction method has been validated by comparing the simulated small‐signal S‐parameters with the measured data from 0.1 GHz to 40 GHz for two different device dimensions.
关键词： small‐signal modeling,parameter extraction,GaN high electron mobility transistor (HEMT)
更新于2025-09-23 15:23:52
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Uniformity and repeatability of InAlN-barrier HEMTs growth by high-speed-rotation single-wafer MOCVD tool
摘要： We fabricated high-electron-mobility transistor structures with InAlN as a barrier layer on 8- or 6-inch Si substrates by using a recently developed high-speed-wafer-rotation single-wafer MOCVD tool. It has been reported that Ga inclusion in the InAlN layer causes serious problems in the control of group III metal composition in some cases, but the samples grown using the tool exhibited an InAlN layer with an abrupt interface and almost no Ga inclusion. Excellent in-wafer uniformity, repeatability, and wafer-to-wafer uniformity of device structure are also reported. The results shown in this paper indicate high performance of the tool in the real production of devices.
关键词： A3. Metalorganic vapor phase epitaxy,B1. Nitrides,B2. Semiconducting III-V materials,B3. High electron mobility transistors
更新于2025-09-23 15:23:52
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Thermal Analysis of AlGaN/GaN High-Electron-Mobility Transistors with Graphene
摘要： A thermal analysis of AlGaN/GaN high electron mobility transistors (HEMTs) with Graphene is investigated using Silvaco and Finite Element Method. Two thermal management solutions are adopted; first of all, graphene is used as dissipation material between SiC substrate and GaN buffer layer to reduce thermal boundary resistance of the device. At the same time, graphene is also used as a thermal spread material on the top of the source contacts to reduce thermal resistance of the device. The thermal analysis results show that the temperature rise of device adopting graphene decreases by 46.5% in transistors operating at 13.86 W/mm. Meanwhile, the thermal resistance of GaN HEMTs with graphene is 6.8 K/W, which is much lower than the device without graphene, which is 18.5 K/W. The thermal management solutions are useful for integration of large-scale graphene into practical devices for effective heat spreading in AlGaN/GaN HEMT.
关键词： AlGaN/GaN,Thermal Management,High-Electron-Mobility Transistors (HEMTs),Graphene
更新于2025-09-23 15:23:52
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Improvement of electrical characteristics in regrown AlGaN/GaN MOSFETs by suppression of the residual interface charge
摘要： In this paper, the influence of a regrown interface on the electrical properties of AlGaN/GaN heterostructure was investigated for recessed-gate MOSFETs fabricated by selective area regrowth. The electron mobility of the two-dimensional electron gas (2DEG) on regrown AlGaN/GaN structures was degraded when the 2DEG was near the regrown interface. The regrown interface had high carrier concentrations and Si impurities that caused degradation of the electron mobility of the 2DEG. Unintentional carrier generation at the regrown interface was eliminated by ultraviolet (UV) treatment before regrowth. A regrown AlGaN/GaN MOSFET device was then fabricated using the UV treatment. The device exhibited good performance such as normally-off operation without hysteresis or leaks. Improvement of the electrical characteristics of AlGaN/GaN MOSFETs was thus achieved by suppression of regrown interface charge.
关键词： B2. Semiconducting gallium compounds,B3 High electron mobility transistors,A1. Interfaces,A3. Metalorganic vapor phase epitaxy,B1. Nitride
更新于2025-09-23 15:22:29
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InAs/GaSb thin layers directly grown on nominal (001)-Si substrate by MOVPE for the fabrication of InAs FINFET
摘要： We demonstrated the fabrication of a densely packed InAs fins network for nanoelectronic applications. High crystalline quality GaSb/InAs layers have been grown directly on 300 mm nominal (001)-Si substrate. The InAs was then processed by etching step using a lithographic mask based on block copolymer to obtain sub-20nm width fins. This block copolymer has been optimized to self-assemble into lamellar structure with a period of 30nm, standing perpendicular to the substrate thanks to a neutral layer. STEM-HAADF characterization displays vertical sidewalls InAs fins with a width as low as 15nm spaced by almost 10nm. Early electrical characterizations exhibit a current flow through the connected fins.
关键词： B3 High electron mobility transistors,B3 Field effect transistors,A3 Organometallic vapor phase epitaxy,A1 Etching,B2 Semiconducting III-V materials
更新于2025-09-23 15:22:29
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Investigation of Trap-Induced Threshold Voltage Instability in GaN-on-Si MISHEMTs
摘要： It is shown that an EC–0.90 eV trap in commercial AlGaN/GaN MISHEMTs grown on a Si (111) substrate is responsible for a ?1.8-V threshold voltage (VT) instability using a combination of defect spectroscopy and double-pulsed current–voltage measurements. The EC ? 0.90 eV trap is located in the GaN buffer and is emptied by high drain biases in pinch-off, which raises the trap above the Fermi level in the GaN buffer. This trap also exhibits both fast and slow recovery processes that are explained by the availability of free electrons throughout the depth of the GaN buffer and the trapping process that depletes the free electron concentration. TCAD modeling is used to demonstrate this process and also to show why there is not a significant increase in buffer leakage current after the large negative VT shift due to this trap. This demonstrates that optimizing buffer designs are critical for ideal device performance.
关键词： deep-level transient spectroscopy (DLTS),isothermal,GaN-on-Si,threshold voltage instability,metal-insulator-semiconductor high electron mobility transistors (MISHEMTs),Capture process,trap
更新于2025-09-23 15:22:29
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A voltage-transient method for characterizing traps in GaN HEMTs
摘要： Trapping e?ects in GaN HEMTs still limit their performance. The current-transient methodology has shown advantages in characterizing traps in the device. However, the voltage drift may cause errors in measurements with high accuracy requirements. In this paper, we present a methodology to characterize traps in GaN HEMTs using the voltage-transient measurements. We demonstrate the advantages of this method in terms of simplicity and e?ectiveness. In particular, it avoids the said problem due to the optimized measuring circuit. With this method, we have identi?ed the time constants and energy levels of traps in the AlGaN barrier layer and the GaN bu?er layer, respectively, in the devices. Their trapping and de-trapping mechanisms were also demonstrated at various temperature measurements. A classic exponential dependence of the degradation rate on the channel current was identi?ed.
关键词： Trapping e?ect,GaN,Voltage transient,High electron mobility transistors (HEMTs)
更新于2025-09-23 15:22:29
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Gate Conduction Mechanisms and Lifetime Modeling of p-Gate AlGaN/GaN High-Electron-Mobility Transistors
摘要： The gate conduction mechanisms in p-gallium nitride (GaN)/AlGaN/GaN enhancement mode transistors are investigated using temperature-dependent dc gate current measurements. In each of the different gate voltage regions, a physical model is proposed and compared to experiment. At negative gate bias, Poole–Frenkel emission (PFE) occurs within the passivation dielectric from gate to source. At positive gate bias, the p-GaN/AlGaN/GaN “p-i-n” diode is in forward operation mode, and the gate current is limited by hole supply at the Schottky contact. At low gate voltages, the current is governed by thermionic emission with Schottky barrier lowering in dislocation lines. Increasing the gate voltage and temperature results in thermally assisted tunneling (TAT) across the same barrier. An improved gate process reduces the gate current in the positive gate bias region and eliminates the onset of TAT. However, at high positive gate bias, a sharp increase in current is observed originating from PFE at the metal/p-GaN interface. Using the extracted conduction mechanisms for both devices, accurate lifetime models are constructed. The device fabricated with the novel gate process exhibits a maximum gate voltage of 7.2 V at t1% = 10 years.
关键词： time-dependent breakdown (TDB),p-GaN gate,high-electron-mobility transistor (HEMT),enhancement mode,gallium nitride (GaN),Conduction mechanism
更新于2025-09-23 15:21:21
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[Springer Theses] Electrical Properties of Indium Arsenide Nanowires and Their Field-Effect Transistors || Introduction
摘要： As the miniaturization and integration of solid-state electronic devices has continued to increase rapidly with the demands of high speed, low power consumption and high storage density, the conventional Si-based technology has lost their advantages on fabrication process. Therefore the technologies based on new materials gradually attract researchers’ attention. Among them, Indium Arsenide (InAs) nanowires (NWs) with high electron mobility is one of the most promising candidate. In this chapter, we introduce the advantages of InAs nanowire on electronic devices and the development status of InAs nanowire electronic devices. Also, the topic ideas and chapter arrangements of this thesis are presented.
关键词： solid-state,high electron mobility,electronic devices,InAs nanowires,miniaturization
更新于2025-09-23 15:21:21
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Discrete-Pulsed Current Time Method to Estimate Channel Thermal Resistance of GaN-Based Power Devices
摘要： A simple electrical method to extract device channel thermal resistance in transistors is presented here. The method compares the dc to discrete-pulsed characteristics and estimates the effective increase in channel temperature under dc biasing conditions. Using the discrete-pulsed I versus t method, the self-heating of the device is effectively eliminated, which helps avoiding the underestimation of the device channel thermal resistance, therefore, making it possible to perform thermal measurements at the high power operation. This technique was applied to lateral GaN HEMTs with three different substrates as well as vertical GaN current aperture vertical electron transistor (CAVET) on sapphire, which proved its sensitivity and validity for different device structures and geometries.
关键词： high-electron mobility transistors (HEMTs),self-heating,current aperture vertical electron transistor (CAVET),Channel thermal resistance
更新于2025-09-23 15:21:01