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Highly sensitive and selective room-temperature NO2 gas-sensing characteristics of SnOX-based p-type thin-film transistor
摘要： The high-performance p-type metal-oxide-semiconductor (MOS)-based gas sensor is an important subject of research in the field of gas-sensing technology. In this work, we demonstrated a p-type MOS-based thin-film transistor (TFT) nitrogen dioxide (NO2) gas sensor that used tin oxide (SnOX) for both the channel and sensing layers. The crystalline status, surface morphology, and atomic-bonding configuration of the thin-film were examined using X-ray diffraction, field emission-scanning electron microscopy, and X-ray photoelectron spectroscopy. The results indicated that the deposited thin-film was mainly composed of polycrystalline SnO with a tetragonal structure. The fabricated p-type SnOX TFT showed a maximum response value of 19.4-10 ppm NO2 at room temperature (RT, 25 °C) when operated in the subthreshold region, which was significantly higher than that of 2.8–10 ppm NO2 obtained from a p-type SnOX thin-film chemiresistor at RT. In addition, the SnOX TFT gas sensor showed significantly higher sensitivity to NO2 gas than to other target gases such as NH3, H2S, CO2, and CO at RT. To the best of our knowledge, this is the first study to a p-type MOS-based field-effect transistor-type gas sensor. Our experimental results demonstrate that the p-type SnOX TFT is a promising gas sensor that can operate at RT with high sensitivity and selectivity to NO2 gas.
关键词： SnO,Thin-film transistor,NO2 gas sensing,SnOX,P-type metal oxide semiconductor
更新于2025-11-21 11:01:37
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Determination of physical mechanism responsible for the capacitance-voltage weak inversion “hump” phenomenon in n-InGaAs based metal-oxide-semiconductor gate stacks
摘要： Weak inversion capacitance-voltage (C-V) “hump” is a widely observed phenomenon at n-InGaAs based metal oxide semiconductor (MOS) structures. The mechanism responsible for this phenomenon is still under discussion. The C-V hump can be explained as an interaction of interface states with either one or both semiconductor energy bands. Each of the proposed mechanisms leads to a different interpretation of C-V hump. Simulating the mechanisms by relevant equivalent circuits, the capacitance and conductance characteristics of the MOS structure were calculated and compared with experimental results. The mechanism responsible for the C-V hump was determined.
关键词： interface states,equivalent circuits,n-InGaAs,metal-oxide-semiconductor,capacitance-voltage hump
更新于2025-11-14 17:28:48
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A comprehensive study on the interface states in the ECR-PECVD SiO2/p-Si MOS structures analyzed by different method
摘要： The electrical properties of SiO2/p-Si films deposited by ECR-PECVD were studied at different frequencies (100-1 MHz) and gate voltages (-6–3 V). Results showed a frequency dispersion of C-Vg and G/ω-Vg. With increasing frequency, the capacitance and conductance are strongly decreased. An apparent peak in the depletion regime of the G/ω-Vg plots can be attributed to the existence of density Nss at Si/SiO2. The (Nss)value vary from 1.5 × 10^12 to 0.5 × 10^11 eV^-1 cm^-2, it has been determined by High-Low frequency capacitance technic. The Nss- Vg curve presents a peak at about -3 V, suggesting the presence Nss between the (Si)/SiO2 interface. Hill and Coleman method shows that the Nss decreases with increasing frequency which explains the high value of capacitance at low frequency. The Nss and their relaxation time τ by the conductance method ranged from 1.8 × 10^13 to 1.37 × 10^11 eV^-1 cm^-2 and 5.17 × 10^-7 to 8 × 10^-6 s, in the range (0.189-Ev) and (0.57- Ev) eV, respectively. The Nss was responsible for the non-ideal behavior of C-Vg and G-Vg leading to the breakdown of such device. Comparing the three method results show that parallel conductance is very precise and accurate.
关键词： Capacitance method,Relaxation time,Frequency,Interface states,Metal/Oxide/Semiconductor (MOS),Conductance method
更新于2025-09-23 15:23:52
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Backside-illuminated CMOS Photodiodes with Embedded Polysilicon Grating Reflectors
摘要： In this study, we investigated the feasibility of replacing metal mirrors with polysilicon gratings to serve as compact optical back reflectors in thin backside-illuminated CMOS photodiodes (BSI CPDs). The unique reflective properties of polysilicon grating reflectors can be implemented within a very small area (12 μm2); i.e., between the contact vias of BSI CPDs. The proposed scheme achieves high optical reflectivity for TE-polarized light at wavelengths exceeding 100 nm, while improving responsivity at near-infrared wavelengths. The resulting BSI CPDs were shown to enhance photocurrent by 1.45x in a polarization-dependent manner (ITE/ITM =1.148) at a wavelength of 980 nm.
关键词： complementary metal oxide semiconductor (CMOS),backside-illuminated photodiode,polysilicon grating reflector
更新于2025-09-23 15:22:29
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[Communications in Computer and Information Science] Advances in Computing and Data Sciences Volume 905 (Second International Conference, ICACDS 2018, Dehradun, India, April 20-21, 2018, Revised Selected Papers, Part I) || Assessing the Performance of CMOS Amplifiers Using High-k Dielectric with Metal Gate on High Mobility Substrate
摘要： With the increase in demand for high-performance ICs for both memory and logic applications, scaling has been continued down to 14 nm node. To meet the performance requirements, high-k dielectrics such as HfO2, ZrO2 have replaced SiO2 in the conventional MOS structure for sub-45 nm node. Correspondingly, the polysilicon gate electrode has been replaced by metal gate electrode in order to enable integration with high-k. Furthermore, the standard silicon substrate has been replaced by high mobility substrate in order to obtain desired transistor performance. While the fabrication technology for CMOS has advanced rapidly the traditional design tools used for designing circuits continues to use conventional MOS structure and their properties. This paper aims to analyze frequency response of CMOS common source ampli?er(CSA) and di?erential ampli?er by simulating in MATLAB using metal gate/high-k/Ge structure and to compare with traditionally used ampli?er design using standard MOS structure.
关键词： CMOS - Complementary Metal Oxide Semiconductor,EOT - E?ective Oxide Thickness,CSA - Common Source Ampli?er,UGB - Unity Gain Bandwidth,High-k dielectrics based ampli?er design
更新于2025-09-23 15:21:01
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92.5% Average Power Efficiency Fully Integrated Floating Buck Quasi-Resonant LED Drivers Using GaN FETs
摘要： LEDs are highly energy ef?cient and have substantially longer lifetimes compared to other existing lighting technologies. In order to facilitate the new generation of LED devices, approaches to improve power ef?ciency with increased integration level for lighting device should be analysed. This paper proposes a fully on-chip integrated LED driver design implemented using heterogeneous integration of gallium nitride (GaN) devices atop BCD circuits. The performance of the proposed design is then compared with the conventional fully on-board integration of power devices with the LED driver integrated circuit (IC). The experimental results con?rm that the fully on-chip integrated LED driver achieves a consistently higher power ef?ciency value compared with the fully on-board design within the input voltage range of 4.5–5.5 V. The maximal percentage improvement in the ef?ciency of the on-chip solution compared with the on-board solution is 18%.
关键词： fully on-chip,gallium nitride (GaN),?oating buck converter,complementary-metal-oxide-semiconductor (CMOS),quasi resonance,integrated LED driver,heterogeneous integration
更新于2025-09-23 15:21:01
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[IEEE 2018 IEEE Photonics Conference (IPC) - Reston, VA, USA (2018.9.30-2018.10.4)] 2018 IEEE Photonics Conference (IPC) - Crack-Free Silicon-Nitride-on-Insulator Nonlinear Circuits for Continuum Generation in the C-Band
摘要： We report on the fabrication and testing of silicon-nitride-on-insulator nonlinear photonic circuits for complementary metal–oxide–semiconductor (CMOS) compatible monolithic co-integration with silicon-based optoelectronics. In particular, a process has been developed to fabricate low-loss crack-free Si3N4 730-nm-thick ?lms for Kerr-based nonlinear functions featuring full process compatibility with existing silicon photonics and front-end Si optoelectronics. Experimental evidence shows that 2.1-cm-long nanowires based on such crack-free silicon nitride ?lms are capable of generating a frequency continuum spanning 1515–1575 nm via self-phase modulation. This work paves the way to time-stable power-ef?cient Kerr-based broad-band sources featuring full process compatibility with Si photonic integrated circuits on CMOS lines.
关键词： frequency continuum,photonic integrated circuits (PICs),Complementary metal–oxide–semiconductor (CMOS),nonlinear optics,silicon-nitride-on-insulator (SiNOI)
更新于2025-09-23 15:21:01
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Enhancing electrostatic coupling in silicon quantum dot array by dual gate oxide thickness for large-scale integration
摘要： We propose a structure with word/bit line control for a two-dimensional quantum dot array, which allows random access for arbitrary quantum dots with a small number of control signals. To control multiple quantum dots with a single signal, every quantum dot should have a wide operating voltage allowance to overcome the property variations. We fabricate two-dimensional quantum dot arrays using silicon-complementary-metal-oxide-semiconductor technology with an alternating dual-standard gate oxide thickness. The quantum dots are designed to have an allowable operating voltage window of 0.2 V to control the number of electrons, which is a window one order of magnitude wider than that of previous works. The proposed structure enables both easy fabrication and operation for multiple quantum dots and will pave the way for practical use of large-scale quantum computers.
关键词： electrostatic coupling,dual gate oxide thickness,quantum dot array,large-scale integration,silicon-complementary-metal-oxide-semiconductor technology
更新于2025-09-23 15:19:57
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Interface property and band offset investigation of GaN based MOS heterostructures with diffusion-controlled interface oxidation technique
摘要： This paper presents the interface analysis and band offset of Al2O3/AlGaN/GaN metal-oxide-semiconductor (MOS) heterostructures with diffusion-controlled interface oxidation (DCIO) treatment. After conventional surface pre-treatment with wet cleaning and nitridation plasma, 1 nm Al2O3 was prepared with atomic layer deposition, followed by in situ plasma-assisted interface oxidation for 30 min. The interface oxidation process is limited by oxidant diffusion through the pre-deposited Al2O3 layer, contributing to the formation of high quality crystalline interfacial oxide layer. For MOS heterostructures with 24.1 nm Al2O3, a positive threshold voltage shift by 1.8 V was obtained by using DCIO technique. The energy band structures and band offset at Al2O3/AlGaN interface was investigated with X-ray photoelectron spectroscopy (XPS). XPS results show that DCIO treatment causes an increase in conduction band offset from 2.29±0.37 eV to 2.92±0.36 eV. There is also a decrease in Al2O3 band slope, indicating a decrease in internal electrical field strength and interface charges. The Al2O3 energy band for these two cases may also cross with each other at a certain point, defining the critical thickness of gate oxide. Generally, the decrease in interface charges by DCIO causes a positive voltage shift, while the voltage shit will change sign with Al2O3 thickness smaller than the critical value. The MOS heterostructures with and without DCIO exhibit very nice relations between threshold voltage and Al2O3 thickness, giving a critical oxide thickness about 1 nm. DCIO results in a decrease in the slope of linear function by about 0.08 V/nm, indicating the reduced interface charges by 3.96×1012 cm-2.
关键词： metal-oxide-semiconductor,GaN,interface oxidation
更新于2025-09-23 15:19:57
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Carbon Nanotube Complementary Gigahertz Integrated Circuits and Their Applications on Wireless Sensor Interface Systems
摘要： Along with ultralow-energy delay products and symmetric complementary polarities, carbon nanotube field-effect transistors (CNT FETs) are expected to be promising building blocks for energy-efficient computing technology. However, the work frequencies of the existing CNT-based complementary metal-oxide-semiconductor (CMOS) integrated circuits (ICs) are far below the requirement (850 MHz) in state-of-art wireless communication applications. In this work, we fabricated deep submicron CMOS FETs with considerably improved performance of n-type CNT FETs and hence significantly promoted the work frequency of CNT CMOS ICs to 1.98 GHz. Based on these high-speed and sensitive voltage-controlled oscillators, we then presented a wireless sensor interface circuit with working frequency up to 1.5 GHz spectrum. As a preliminary demonstration, an energy-efficient wireless temperature sensing interface system was realized combining a 150 mAh flexible Li-ion battery and a flexible antenna (center frequency of 915 MHz). In general, the CMOS-logic high-speed CNT ICs showed outstanding energy efficiency and thus may potentially advance the application of CNT-based electronics.
关键词： complementary metal-oxide semiconductor,sensor interface,voltage-controlled oscillators,field-effect transistors,carbon nanotube film
更新于2025-09-19 17:15:36