- 标题
- 摘要
- 关键词
- 实验方案
- 产品
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<i>(Invited)</i> Physics and Compact Modeling of SiGe HBT Linearity Using Mextram
摘要： This paper presents fundamentals of SiGe HBT RF linearity and its compact modeling using Mextram 504.12 and the latest Mextram, 505.00, for both common-emitter and common-base configurations. Collector-base junction depletion capacitance model is shown to be significant for accurate modeling of peak IP3 behavior, for which two new options are introduced in Mextram 505.00. Current dependence of avalanche factor is shown to be important for accurate modeling of IP3 peak. This is increasingly important in emerging RF applications requiring SiGe HBTs to operate at increasingly high VCB with negative IB.
关键词： SiGe HBT,compact modeling,IP3,RF linearity,Mextram,avalanche factor
更新于2025-09-23 15:21:01
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[IEEE 48th European Solid-State Device Research Conference (ESSDERC 2018) - Dresden (2018.9.3-2018.9.6)] 2018 48th European Solid-State Device Research Conference (ESSDERC) - Compact MEMS modeling to design full adder in Capacitive Adiabatic Logic
摘要： We propose implementation of a 1-bit full adder following Capacitive Adiabatic Logic (CAL) paradigm. Combinational logic functions including AND, OR, and XOR gates are realized by five-terminal comb-drive MEMS elements. By in CAL, we demonstrate the ability of MEMS device to be cascadable. By MEMS compact modeling, we can evaluate the energy dissipation and speed of adding operation. In the presented full adder, 99.6% of the energy transferred to the device is recovered for later use when it operates on 2 kOPS.
关键词： compact modeling,capacitive adiabatic logic,MEMS,full adder,high-temperature electronics
更新于2025-09-23 15:21:01
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[IEEE 2019 PhotonIcs & Electromagnetics Research Symposium - Spring (PIERS-Spring) - Rome, Italy (2019.6.17-2019.6.20)] 2019 PhotonIcs & Electromagnetics Research Symposium - Spring (PIERS-Spring) - Generating and Steering of Quasi-nondiffraction Beam by Substrate Integrated Waveguide Slot Array Antenna
摘要： This paper presents a physics-based compact modeling approach that incorporates the impact of total ionizing dose (TID) and stress-induced defects into simulations of metal-oxide-semiconductor (MOS) devices and integrated circuits (ICs). This approach utilizes calculations of surface potential (ψs) to capture the charge contribution from oxide trapped charge and interface traps and to describe their impact on MOS electrostatics and device operating characteristics as a function of ionizing radiation exposure and aging effects. The modeling approach is demonstrated for bulk and silicon-on-insulator (SOI) MOS device. The formulation is verified using TCAD simulations and through the comparison of model calculations and experimental I-V characteristics from irradiated devices. The modeling approach is suitable for simulating TID and aging effects in advanced MOS devices and ICs, and is compatible with modern MOSFET compact modeling techniques. A circuit-level demonstration is given for TID and aging effects in SRAM cells.
关键词： MOSFET,SOI,semiconductor devices,compact modeling,ionizing radiation,Aging effects
更新于2025-09-23 15:19:57
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Ultra-High-Speed 2:1 Digital Selector and Plasmonic Modulator IM/DD Transmitter Operating at 222 GBaud for Intra-Datacenter Applications
摘要： This paper presents a physics-based compact modeling approach that incorporates the impact of total ionizing dose (TID) and stress-induced defects into simulations of metal-oxide-semiconductor (MOS) devices and integrated circuits (ICs). This approach utilizes calculations of surface potential (ψs) to capture the charge contribution from oxide trapped charge and interface traps and to describe their impact on MOS electrostatics and device operating characteristics as a function of ionizing radiation exposure and aging effects. The modeling approach is demonstrated for bulk and silicon-on-insulator (SOI) MOS device. The formulation is verified using TCAD simulations and through the comparison of model calculations and experimental I-V characteristics from irradiated devices. The modeling approach is suitable for simulating TID and aging effects in advanced MOS devices and ICs, and is compatible with modern MOSFET compact modeling techniques. A circuit-level demonstration is given for TID and aging effects in SRAM cells.
关键词： compact modeling,SOI,ionizing radiation,semiconductor devices,MOSFET,Aging effects
更新于2025-09-23 15:19:57
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[IEEE 2020 10th Annual Computing and Communication Workshop and Conference (CCWC) - Las Vegas, NV, USA (2020.1.6-2020.1.8)] 2020 10th Annual Computing and Communication Workshop and Conference (CCWC) - DFB Laser Chip Defect Detection Based on Successive Subspace Learning
摘要： This paper presents a physics-based compact modeling approach that incorporates the impact of total ionizing dose (TID) and stress-induced defects into simulations of metal-oxide-semiconductor (MOS) devices and integrated circuits (ICs). This approach utilizes calculations of surface potential (ψs) to capture the charge contribution from oxide trapped charge and interface traps and to describe their impact on MOS electrostatics and device operating characteristics as a function of ionizing radiation exposure and aging effects. The modeling approach is demonstrated for bulk and silicon-on-insulator (SOI) MOS device. The formulation is verified using TCAD simulations and through the comparison of model calculations and experimental I-V characteristics from irradiated devices. The modeling approach is suitable for simulating TID and aging effects in advanced MOS devices and ICs, and is compatible with modern MOSFET compact modeling techniques. A circuit-level demonstration is given for TID and aging effects in SRAM cells.
关键词： MOSFET,SOI,semiconductor devices,compact modeling,ionizing radiation,Aging effects
更新于2025-09-23 15:19:57
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[IEEE 2019 Conference on Lasers and Electro-Optics Europe & European Quantum Electronics Conference (CLEO/Europe-EQEC) - Munich, Germany (2019.6.23-2019.6.27)] 2019 Conference on Lasers and Electro-Optics Europe & European Quantum Electronics Conference (CLEO/Europe-EQEC) - Towards a Suburban Quantum Network Link
摘要： This paper presents a physics-based compact modeling approach that incorporates the impact of total ionizing dose (TID) and stress-induced defects into simulations of metal-oxide-semiconductor (MOS) devices and integrated circuits (ICs). This approach utilizes calculations of surface potential (ψs) to capture the charge contribution from oxide trapped charge and interface traps and to describe their impact on MOS electrostatics and device operating characteristics as a function of ionizing radiation exposure and aging effects. The modeling approach is demonstrated for bulk and silicon-on-insulator (SOI) MOS device. The formulation is verified using TCAD simulations and through the comparison of model calculations and experimental I-V characteristics from irradiated devices. The modeling approach is suitable for simulating TID and aging effects in advanced MOS devices and ICs, and is compatible with modern MOSFET compact modeling techniques. A circuit-level demonstration is given for TID and aging effects in SRAM cells.
关键词： compact modeling,SOI,ionizing radiation,semiconductor devices,MOSFET,Aging effects
更新于2025-09-19 17:13:59
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[IEEE 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC) - Chicago, IL, USA (2019.6.16-2019.6.21)] 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC) - UV exposure: a novel processing method to fabricate nanowire solar cells
摘要： This paper presents a physics-based compact modeling approach that incorporates the impact of total ionizing dose (TID) and stress-induced defects into simulations of metal-oxide-semiconductor (MOS) devices and integrated circuits (ICs). This approach utilizes calculations of surface potential (ψs) to capture the charge contribution from oxide trapped charge and interface traps and to describe their impact on MOS electrostatics and device operating characteristics as a function of ionizing radiation exposure and aging effects. The modeling approach is demonstrated for bulk and silicon-on-insulator (SOI) MOS device. The formulation is verified using TCAD simulations and through the comparison of model calculations and experimental I-V characteristics from irradiated devices. The modeling approach is suitable for simulating TID and aging effects in advanced MOS devices and ICs, and is compatible with modern MOSFET compact modeling techniques. A circuit-level demonstration is given for TID and aging effects in SRAM cells.
关键词： MOSFET,SOI,semiconductor devices,compact modeling,ionizing radiation,Aging effects
更新于2025-09-19 17:13:59
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[IEEE 48th European Solid-State Device Research Conference (ESSDERC 2018) - Dresden (2018.9.3-2018.9.6)] 2018 48th European Solid-State Device Research Conference (ESSDERC) - Compact Modeling for Power Efficient Circuit Design
摘要： Reduction of power loss in circuit operation is an urgent task to save energy. For this purpose accurate prediction of the device-level power loss is a prerequisite. The core compact modeling approach is presented, which can be easily extended to include non-ideal effects to be considered. With use of the developed model it is demonstrated that any phenomena, which prevent the gate control, become the origin of an increased power loss. An optimization scheme for achieving low power loss, based on the presented compact modeling approach, is discussed with basic circuits.
关键词： power loss,MOSFETs,carrier dynamics,compact modeling,circuit performance
更新于2025-09-04 15:30:14